[Metal] Add reduction and infinity lowering - #2968
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…2 boundary - tl.infinity lowering/offline-MSL/MPS tests for fp32/fp16/bf16 - bf16/fp16 reduce lower + MPS runtime tests (fp32-accumulate path) - clear=False duplicate-buffer update lower tests (fp32 + bf16) - multi-block closure (N = k*nt) MPS runtime tests - Reducer v2 (FinalizeReducerOp) fail-loud boundary test + docs - explicit participating-range/nt-block alignment contract comment - codegen: cast fp16/bf16 FloatImm literals (INFINITY/NAN/finite) to half/bfloat; bare literals fail MSL compile for bf16 and make select() ambiguous for fp16 - runtime tests use execution_backend=torch (supported Metal path); tvm_ffi rejects torch MPS tensors (device_type mismatch)
…ign infinity conventions
Problem and change
Metal has no target-specific
T.reducelowering, so normalization and routing reductions used by Qwen dense, Qwen MoE, and DeepSeek-style workloads cannot compile for Apple GPUs. Add a MetalReduceImplwith fp32 accumulation, uniform barriers, and compile-time checks that keep each XOR butterfly inside a valid simdgroup closure. Also register Metal lowering fortl.infinity; other math intrinsics are unchanged.Files:
src/metal/op/reduce.cc,src/metal/op/math.cc, andtesting/python/metal/test_metal_reduce.py.Before and after
On the same Apple M2,
origin/maincannot lower the 16x2 fp32, 32-thread reduction because no Metal implementation is registered. This PR executesreduce_sumandreduce_maxon MPS and matches the CPU reference withinrtol=1e-5,atol=1e-5.Performance classification: Performance enablement. This is not an isolated
main-versus-PR speedup becausemaincannot lower the kernel. The following fresh Apple M2 measurements on this PR head use MPS events, three interleaved rounds, 25 warmups, and a 50-launch timing batch; they are downstream evidence enabled by the reduction lowering:410.0 us/token(195.0 us/tokenon the GPU timeline).28.3 us/token(23.9 us/tokenon the GPU timeline), or14.5xlower synchronized per-token latency.Validation
Twenty-nine compile/lower cases run on every platform; two numerical cases require MPS and skip elsewhere.
Scope
Targets the M1-M4 MSL/simdgroup path; the M5 Metal 4 TensorOps/FP8 path is out of scope. Cross-simdgroup, non-power-of-two or misaligned, batched, and deferred reduction plans remain unsupported.
Appendix: combined campaign results (组合 campaign 结果)
The table below describes the complete Apple M2 optimization campaign, not the isolated contribution or acceptance criteria of this PR. Where
origin/maincannot execute the workload correctly, a numerical speedup versusmainis undefined; the nearest valid performance baseline is stated explicitly.origin/main28.3 us/tokensynchronized,23.9 us/tokenGPU timeline14.5xversus the valid single-token path (410.0 us/token)16.92 ms1.21xversus the previous valid 17-launch composed path (20.53 ms)19.86x; shared-C14.16xversus correct t32 pathsmain685.7 us/697.4 us16.9xversus the initial campaign kernel; expert fp426%faster than its earlier campaign version114.1 ms; T=116.7 ms80.8%/48.0%lower latency versus the valid full-pipeline baseline