`core::num::f16b` Rust's 16bit Brain Float by Jamesbarford · Pull Request #160859 · rust-lang/rust

Jamesbarford · 2026-08-10T14:27:46Z

Implements the RFC: f16b type. Best reviewed commit by commit, happy to split into separate PRs if that is deemed easier to review. However the line count and surface area is, in my opinion, reasonably small.

Adds;

ABI plumbing for the f16b along with bfloat lang item to work with LLVM, GCC is explicitly unimplemented!(...)
f16b feature gate, page for f16b on libruscdoc and a struct bf16 in core::num
Tests
Treat f16b as a scalar primitive for scalable vectors

Issues;

rustbot · 2026-08-10T14:27:50Z

Some changes occurred in compiler/rustc_attr_ir

cc @jdonszelmann, @JonathanBrouwer

This PR changes rustc_public

cc @oli-obk, @celinval, @ouz-a, @makai410

rustc_codegen_gcc is developed in its own repository. If possible, consider making this change to rust-lang/rustc_codegen_gcc instead.

cc @antoyo, @GuillaumeGomez

rustbot · 2026-08-10T14:27:54Z

r? @jieyouxu

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jieyouxu · 2026-08-10T14:45:34Z

@rustbot reroll

antoyo · 2026-08-10T14:48:39Z

    }

+    fn type_f16b(&self) -> Type<'gcc> {
+        bug!("f16b is not supported by the GCC codegen backend")


I believe GCC actually supports this type: https://github.com/rust-lang/gccjit.rs/blob/master/src/context.rs#L1482

View changes since the review

Thanks 😄, I will aim to add it in a follow up PR 👍

Actually, as @folkertdev pointed out, it was a doddle. So I've included the implementation in the PR 👍

rustbot · 2026-08-10T14:48:49Z

rustc_codegen_cranelift is developed in its own repository. If possible, consider making this change to rust-lang/rustc_codegen_cranelift instead.

cc @bjorn3

rustbot · 2026-08-12T12:03:56Z

Some changes occurred in cfg and check-cfg configuration

cc @Urgau

miri is developed in its own repository. If the Miri part of this change can be broken out, consider making this change to rust-lang/miri instead. However, if Miri needs adjusting for rustc changes, just ignore this message.

cc @rust-lang/miri

mati865 · 2026-08-12T13:36:14Z

I'm not a good reviewer for this change. Can somebody here pick it up rather than blindly rerolling?

folkertdev · 2026-08-12T13:54:02Z

r? me

@folkertdev

…lkertdev Make sin, cos, exp, exp2, log, log2, log10 generic Rebased and smaller version of rust-lang/rust#153934 Following `fabs`, make the `sin`, `cos`, `exp`, `exp2`, `log`, `log2` and `log10` intrinsics generic over the float type, rather than having four variants per float type. The first two commits are purely stylistic: - reorganised Cranelift code to make following changes simpler - moved a misplaced comment in `compiler/rustc_codegen_llvm/src/intrinsic.rs` that caused `x fmt` to give up The last commit actually makes them generic! Most code is a bit simpler, ~~and this will also hopefully simplify adding support for these intrinsics for the future [`bf16` type](rust-lang/rust#160859 :) Unfortunately both GCC and Cranelift backend changes are a bit churny. Their code is a bit, opaque, to put it kindly, and I didn't want to refactor those here. r? @folkertdev cc @RalfJung

folkertdev

some nits

I diagnosed the arm/aarch64 issue to be about what types are valid in a homogeneous float aggregate. Not much we can do about that here.

View changes since this review

@folkertdev

…lkertdev Make sin, cos, exp, exp2, log, log2, log10 generic Rebased and smaller version of rust-lang/rust#153934 Following `fabs`, make the `sin`, `cos`, `exp`, `exp2`, `log`, `log2` and `log10` intrinsics generic over the float type, rather than having four variants per float type. The first two commits are purely stylistic: - reorganised Cranelift code to make following changes simpler - moved a misplaced comment in `compiler/rustc_codegen_llvm/src/intrinsic.rs` that caused `x fmt` to give up The last commit actually makes them generic! Most code is a bit simpler, ~~and this will also hopefully simplify adding support for these intrinsics for the future [`bf16` type](rust-lang/rust#160859 :) Unfortunately both GCC and Cranelift backend changes are a bit churny. Their code is a bit, opaque, to put it kindly, and I didn't want to refactor those here. r? @folkertdev cc @RalfJung

@folkertdev

…lkertdev Make sin, cos, exp, exp2, log, log2, log10 generic Rebased and smaller version of rust-lang/rust#153934 Following `fabs`, make the `sin`, `cos`, `exp`, `exp2`, `log`, `log2` and `log10` intrinsics generic over the float type, rather than having four variants per float type. The first two commits are purely stylistic: - reorganised Cranelift code to make following changes simpler - moved a misplaced comment in `compiler/rustc_codegen_llvm/src/intrinsic.rs` that caused `x fmt` to give up The last commit actually makes them generic! Most code is a bit simpler, ~~and this will also hopefully simplify adding support for these intrinsics for the future [`bf16` type](rust-lang/rust#160859 :) Unfortunately both GCC and Cranelift backend changes are a bit churny. Their code is a bit, opaque, to put it kindly, and I didn't want to refactor those here. r? @folkertdev cc @RalfJung

folkertdev · 2026-09-13T15:29:39Z

+use minicore::From;
+use minicore::num::f16b;
+
+// CHECK-LABEL: {{^"?[#_]?identity_f16b"?:}}


what is this regex for? just CHECK-LABEL: identity_f16b should suffice?

View changes since the review

Done a9b2c63

rustbot · 2026-09-14T08:36:50Z

This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

Jamesbarford · 2026-09-15T08:13:08Z

@bors try jobs=test-various,aarch64-apple-,-gnu-nopt-,x86_64-mingw-,aarch64-msvc-*,arm-android

`core::num::f16b` Rust's 16bit Brain Float try-job: test-various try-job: aarch64-apple-* try-job: *-gnu-nopt-* try-job: x86_64-mingw-* try-job: aarch64-msvc-* try-job: arm-android

rust-bors · 2026-09-15T08:14:07Z

💔 Test for 8f68b95 failed: CI. Failed job:

Calculate job matrix (web logs, enhanced plaintext logs)

rust-log-analyzer · 2026-09-15T08:14:10Z

A job failed! Check out the build log: (web) (plain enhanced) (plain)

Click to see the possible cause of the failure (guessed by this bot)

   Compiling diff v0.1.13
   Compiling citool v0.1.0 (/home/runner/work/rust/rust/src/ci/citool)
    Finished `dev` profile [unoptimized] target(s) in 25.45s
     Running `target/debug/citool calculate-job-matrix`
Run type: TryJob { job_patterns: Some(["test-various", "aarch64-apple-*", "*-gnu-nopt-*", "x86_64-mingw-*", "aarch64-msvc-*", "arm-android"]), nolimit: false }
Error: Failed to calculate job matrix

Caused by:
    Patterns `aarch64-apple-*, x86_64-mingw-*, aarch64-msvc-*, arm-android` did not match any auto jobs
##[error]Process completed with exit code 1.
Post job cleanup.

Jamesbarford · 2026-09-15T10:22:13Z

I believe some of the jobs were renamed

@bors try jobs=test-various,test-aarch64-apple-,-gnu-nopt-,test-x86_64-mingw-,test-aarch64-msvc-*,test-arm-android

`core::num::f16b` Rust's 16bit Brain Float try-job: test-various try-job: test-aarch64-apple-* try-job: *-gnu-nopt-* try-job: test-x86_64-mingw-* try-job: test-aarch64-msvc-* try-job: test-arm-android

rust-bors · 2026-09-15T13:16:05Z

☀️ Try build successful (CI)
Build commit: 2027cd7 (2027cd7f37bc10f8ed9010e7e13772d9306d7d42)
Base parent: c26ce70 (c26ce708de5d14682647895d2f3caf38f70b5aa6)

folkertdev

Some final nits, but otherwise I think this looks good

View changes since this review

folkertdev · 2026-09-15T16:16:54Z

+                    // No `f16b` type
+                    Float::F16B => unreachable!("`f16b` unsupported on mips64"),


Suggested change

// No `f16b` type

Float::F16B => unreachable!("`f16b` unsupported on mips64"),

Float::F16B => unreachable!("`f16b` unsupported on mips64"),

nit but the panic message is clear enough I think

tgross35

Few small requests but overall LGTM

View changes since this review

tgross35 · 2026-09-15T20:58:05Z

+        // This is similar to <https://github.com/llvm/llvm-project/issues/94434>, however
+        // does not work until LLVM 23 on Windows.
+        (Arch::Arm64EC, _) => major >= 23,
+        (Arch::AArch64, _) | (Arch::X86_64, _) | (Arch::RiscV64, _) | (Arch::LoongArch64, _) => {


Simplification nit

Suggested change

(Arch::AArch64, _) | (Arch::X86_64, _) | (Arch::RiscV64, _) | (Arch::LoongArch64, _) => {

(Arch::AArch64 | Arch::X86_64 | Arch::RiscV64 | Arch::LoongArch64, _) => {

tgross35 · 2026-09-15T21:01:38Z

        begin_panic,
        bench,
        bevy_ecs,
+        bfloat,


Is this actually used anymore or can it be deleted?

tgross35 · 2026-09-15T21:12:18Z

+// RISCV64: fmv.x.w a0, fa0
+// RISCV64-NEXT: lui a1, 1048560
+// RISCV64-NEXT: or a0, a0, a1
+// RISCV64-NEXT: fmv.w.x fa0, a0
+// RISCV64-NEXT: ret


It seems to be setting the high bits to 0xffff here, which is kind of weird. I assume the ABI permits garbage in the upper bits (looking at what it does for f16b_to_bits) rather than requiring 0xffff.... for returns but apparently not passing? Seems worth an LLVM optimization issue if there isn't one.

Cc @beetrees I'm sure you have a better idea about this.

tgross35 · 2026-09-15T21:15:10Z

+#[inline]
+const fn widen(value: f16b) -> f32 {
+    f32::from_bits((value.to_bits() as u32) << 16)
+}


Are we using this because LLVM doesn't support this operation? Or is it supported and we will use an intrinsic in the future?

Worth a comment in any case.

rustbot added A-attributes Area: Attributes (`#[…]`, `#![…]`) A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. labels Aug 10, 2026

rustbot assigned jieyouxu Aug 10, 2026

rustbot added T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. T-libs Relevant to the library team, which will review and decide on the PR/issue. labels Aug 10, 2026

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antoyo reviewed Aug 10, 2026

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Jamesbarford force-pushed the feat/fb16-pt1 branch from bf10f8a to 01c5c1b Compare August 10, 2026 14:48

bjorn3 reviewed Aug 10, 2026

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Comment thread compiler/rustc_ty_utils/src/layout.rs

bjorn3 reviewed Aug 10, 2026

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folkertdev reviewed Aug 11, 2026

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Comment thread compiler/rustc_target/src/callconv/mips64.rs

Comment thread library/core/src/num/f16b.rs Outdated

Comment thread compiler/rustc_codegen_ssa/src/mir/naked_asm.rs Outdated

tgross35 reviewed Aug 11, 2026

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Comment thread library/core/src/num/f16b.rs Outdated

Comment thread library/core/src/num/bfloat.rs

Comment thread tests/codegen-llvm/float/f16b.rs Outdated

Jamesbarford force-pushed the feat/fb16-pt1 branch from 53d3660 to 40d3f6e Compare August 12, 2026 08:19

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Jamesbarford force-pushed the feat/fb16-pt1 branch from da620d0 to 0ed984f Compare August 12, 2026 10:08

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Comment thread compiler/rustc_target/src/callconv/sparc64.rs Outdated

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Jamesbarford force-pushed the feat/fb16-pt1 branch from d8ba332 to 2f22e82 Compare September 7, 2026 12:24

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Jamesbarford force-pushed the feat/fb16-pt1 branch from 2f22e82 to a9b2c63 Compare September 14, 2026 08:36

Jamesbarford added 5 commits September 14, 2026 12:54

f16b Implementation and documentation

d8c7488

Add F16B to Float enum & wireup trivial matches

b3053ed

Wire up f16b in backends

7815ae0

Update Tidy rules to allow for //@ revision

5557bc2

Update and write tests

73621dc

Jamesbarford force-pushed the feat/fb16-pt1 branch from a9b2c63 to 73621dc Compare September 14, 2026 11:56

		// No `f16b` type
		Float::F16B => unreachable!("`f16b` unsupported on mips64"),

	(Arch::AArch64, _) \| (Arch::X86_64, _) \| (Arch::RiscV64, _) \| (Arch::LoongArch64, _) => {
	(Arch::AArch64 \| Arch::X86_64 \| Arch::RiscV64 \| Arch::LoongArch64, _) => {

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