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Feat/gap9 training power collection - #41

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Feat/gap9 training power collection#41
runwangdl wants to merge 1 commit into
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feat/gap9-training-power-collection

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Describe the intent of your PR here.

Added

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Fixed

PR Merge Checklist

  1. The PR is rebased on the latest devel commit and pointing to devel.
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  4. The CHANGELOG.md file has been updated.
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@runwangdl
runwangdl force-pushed the feat/gap9-training-power-collection branch 2 times, most recently from 53946a9 to ac1ec5f Compare June 29, 2026 22:17
…ime dispatch

Output-stationary ConvGradX (dX): for each dX position accumulate the full
(co,ky,kx) reduction in a register and write dX once, instead of the scatter
kernel's Cout*K read-modify-writes into dX (an FPU-stalled dependent chain).

The gather needs dY fully readable, so it is only correct when the conv is NOT
spatially tiled. A runtime numeric tile-vs-full-dim check falls back to the
scatter kernel for spatially-split convs (e.g. ResNet8 single-buffer), so it is
correct on every config while taking the fast path on promote+DB. The template
captures the untiled output dims (alignToContext, pre-tiling) and passes them.

ResNet8 GAP9 GVSoC, golden (Errors 0/4): promote+DB 51.9M/step (gather, vs
scatter 68M); single-buffer 55.0M/step (dispatch->scatter for split convs).

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
@runwangdl
runwangdl force-pushed the feat/gap9-training-power-collection branch from ac1ec5f to 7b2728e Compare June 29, 2026 22:19
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