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394a51a
WIP: Intgerate Spatz core into Snitch cluster.
DiyouS May 8, 2026
bc8959e
[Util] Update opcodes.
DiyouS May 8, 2026
b35cf4d
[ReqRsp] Separate as a bender dependancy for overwriting Spatz core.
DiyouS May 14, 2026
444b553
WIP: fix bugs in Spatz integration
DiyouS May 14, 2026
b9bb304
[SW] Add a simple spatz test.
DiyouS May 14, 2026
853fe36
[LLVM] Turn off auto vectorization
DiyouS May 14, 2026
8b14fad
[ReqRsp] Fix a AMO type definiation.
DiyouS May 19, 2026
c4f4e83
[Makefile][LLVM] Fully turn off auto-vectorization
DiyouS May 19, 2026
367cfb2
[Bender] Update Spatz core to latest version
DiyouS May 19, 2026
d995b2f
[ReqRsp] Switch back to hardcoded version to avoid overiden by other …
DiyouS May 26, 2026
3e6dd76
[SRC] Add cut to break down combloop on XIF.
DiyouS May 26, 2026
56d0beb
[Makefile] Waive enum type pass in error.
DiyouS May 26, 2026
b44e0a4
[SW] Add more spatz test kernels
DiyouS May 29, 2026
6acef29
[DEP] Update Spatz version.
DiyouS May 29, 2026
7e09193
[SW][CFG] Add FP16 support in DMA core of spatz configuration. Add se…
DiyouS Jun 3, 2026
e83bed0
[CFG] Import spatz configurations to make it configurable from snitch…
DiyouS Jun 3, 2026
c006ceb
[Runtime] Temporarily disable some tests due to LLVM env issue.
DiyouS Jun 17, 2026
c4e36f6
Adjust verif_utils.py for new mxgemm
colluca Jul 22, 2026
2592a3c
[snrt] Skip inter cluster barrier for single cluster
gamzeisl Apr 10, 2026
8db47fe
[CFG] Add spatz configuration with external memroy interface
colluca Jul 22, 2026
73114e6
[Bender] Update Spatz pointer to spatz_vpu repo, with common cell v2 …
DiyouS Jul 23, 2026
917d6f8
Revert changes and minor cleanup
colluca Jul 22, 2026
16d5fd0
Use Bender override for riscv_instr.sv
colluca Jul 22, 2026
17959b4
Derive RVV parameter from ISA string
colluca Jul 22, 2026
c4cbef6
Extend Spatz config generation
colluca Jul 23, 2026
3b3af38
common.mk: Track missing clustergen prerequisite
colluca Jul 23, 2026
43d3c3c
[Bender] Update Spatz version to include latest cfg generation.
DiyouS Jul 23, 2026
ab5aba7
[CFG] Add vector extention into clustergen python.
DiyouS Jul 23, 2026
3ecc2ae
schema: Add description on how to set `atomic_id_width`
colluca Jul 23, 2026
ccef15e
[SRC] Fix several leftover for common-cell v2 support
DiyouS Jul 23, 2026
ae14932
Revert "[SRC] Fix several leftover for common-cell v2 support"
colluca Jul 24, 2026
3cc7963
treewide: Rename Xf16 to Zfh
colluca Jul 24, 2026
eb0fd92
hw: Clean up tracer logic
colluca Jul 24, 2026
8d6b959
reqrsp: Add `reqrsp_demux_mapped` module
colluca Jul 24, 2026
5b339cd
cv_x_if: Add `cvxif_demux` module
colluca Jul 24, 2026
9fb8e75
reqrsp: Extend generic reqrsp typedefs
colluca Jul 24, 2026
111d42e
generic_reqrsp_mux: Minor cleanup
colluca Jul 24, 2026
8888491
snitch_pkg: Document why `acc_addr_e` cannot go in `snitch_cc_pkg`
colluca Jul 24, 2026
2763274
hw: Separate SSR subsystem from core complex
colluca Jul 24, 2026
8a18c70
tcdm_interface: Improve typedefs
colluca Jul 24, 2026
272e966
hw: Clean up Snitch CC, Spatz CC integration and merge Spatz and Snit…
colluca Jul 24, 2026
febda7d
Fix few Verible lint warnings
colluca Jul 24, 2026
1055976
Upstream `cvxif_demux` module
colluca Jul 24, 2026
7c16f7b
riscv_instr: Waive Verible lint errors
colluca Jul 25, 2026
04b4a2f
spatz_cfg.json.tpl: Add license header
colluca Jul 25, 2026
3fbf457
hw: Separate CC sources from snitch_cluster subdir
colluca Jul 25, 2026
04bdd26
Bump core-v-xif
colluca Jul 25, 2026
d510d8f
Make sure riscv_instr lint fix is tracked
colluca Jul 25, 2026
382c912
Fix Yosys synthesis
colluca Jul 25, 2026
8366475
Fix sources-up-to-date job
colluca Jul 25, 2026
ad9a4f1
[Deps] Update spatz_vpu version.
DiyouS Jul 25, 2026
e911ae6
Properly include Spatz Python dependencies
colluca Jul 26, 2026
3ecf294
Make sure Bender dependencies are initialized for Python
colluca Jul 26, 2026
75081ce
fixup! Properly include Spatz Python dependencies
colluca Jul 26, 2026
1ff5aa1
Checkout Bender dependencies after repo checkout in CI
colluca Jul 27, 2026
9ef35ee
ci: Upload Yosys artifacts for debugging
colluca Jul 27, 2026
5fb95be
hw: Move `hart_id_t` to snitch_pkg
colluca Jul 27, 2026
1fbb7fc
Remove redundant `spatz` Bender target
colluca Jul 27, 2026
c83486c
Prefix `riscv_instr` file and package to avoid name conflicts
colluca Jul 27, 2026
2cf2f66
vsim.mk: Remove unnecessary -suppress flags
colluca Jul 27, 2026
c85e7d9
sw: Remove unnecessary changes to `start.c`
colluca Jul 27, 2026
36cfcab
hw: Fix RTL bugs introduced in CC refactoring
colluca Jul 28, 2026
fd89d42
verilator.mk: Redirect stderr in addition to stdout to log
colluca Jul 28, 2026
10cc54a
verilator: Replace VCD with FST tracing
colluca Jul 28, 2026
4d0f9e4
treewide: Bump Python to >=3.12 and add Tsunami package
colluca Jul 28, 2026
b36c100
Merge branch 'main' to pick up IPC wait-for-completion fix (#327)
colluca Jul 28, 2026
755a35d
hw: Fix concatenation of TCDM ports when RVV==0
colluca Jul 28, 2026
53d16ab
verilator.mk: Gate VCD tracing on DEBUG build
colluca Jul 28, 2026
9499c55
tb: Fix Verilator FST trace
colluca Jul 28, 2026
0983988
[SRC] Remove XIF-related debugging log
DiyouS Jul 28, 2026
31fdb18
[SRC][Bender] Benderize snitch and reqrsp interface as local dependen…
DiyouS Jul 28, 2026
b0f72e6
fixup! tb: Fix Verilator FST trace
colluca Jul 28, 2026
2deffcc
ci: Print base SHA
colluca Jul 28, 2026
80b34e1
[Bender] Add missing Bender.yml for snitch and reqrsp_interface.
DiyouS Jul 28, 2026
e142713
Fix new `Bender.yml`s (reqrsp needs snitch dep, not viceversa)
colluca Jul 28, 2026
e10912f
make: Add new `Bender.yml`s as prerequisites
colluca Jul 28, 2026
72584de
make: Create separate goal for `bender script verilator`
colluca Jul 28, 2026
c5919f1
Limit Verilator trace visibility to meet CI memory constraints
colluca Jul 28, 2026
f58f561
ci: Fix merge base on forks
colluca Jul 29, 2026
cc6bb24
ci: Bump `make-prerequisites-changed` action
colluca Jul 29, 2026
5c7e0ba
[SW] Move and align spatz kernels with the style of existing snitch t…
DiyouS Jul 29, 2026
232724a
[SW] Skip spatz kernels if spatz is not in use in the configuration
DiyouS Jul 29, 2026
70b4e3c
[CI] Add spatz tests into CI for spatz configuration
DiyouS Jul 29, 2026
becc41e
sw: Derive toolchain flags directly from cfg
colluca Jul 29, 2026
c02bb6a
ci: Drop unnecessary `SN_MCPU` flag
colluca Jul 29, 2026
8d854d8
rtl.mk: Split bootrom goal into multiple separate goals
colluca Jul 30, 2026
2b750a2
make: Separate toolchain makefrag for both RTL and SW
colluca Jul 30, 2026
4047316
riscv-tests: Guard SN_RISCV_CC call when undefined
colluca Jul 30, 2026
40e8718
[SW] Extend guard to avoid building the kernel for non-spatz configur…
DiyouS Jul 30, 2026
4c11039
[Bender] Add a temp fix for circular dependency between reqrsp_interf…
DiyouS Jul 30, 2026
1a1e954
Progressively evaluate Makefile -> toolchain first
colluca Jul 30, 2026
d775ab7
make: Clean up multi-stage Makefile evaluation
colluca Jul 30, 2026
5963bb4
docs: Update system integration guide with latest changes
colluca Jul 30, 2026
abeef5b
Fix Mempool software build
colluca Jul 30, 2026
db500a0
[SW] Remove selective GEMV temporarily
DiyouS Jul 30, 2026
106fdba
Merge remote-tracking branch 'origin/develop' into spatz-mxcore
colluca Jul 30, 2026
a0b40d3
Revert "[Bender] Add a temp fix for circular dependency between reqrs…
colluca Jul 31, 2026
3bece2b
hw: Clean up interfaces to break reqrsp->snitch dependency
colluca Jul 31, 2026
ff5c444
treewide: Add make targets for IP tests
colluca Jul 31, 2026
07cc9f7
hw: Move LSU and reqrsp_interface to separate repos
colluca Aug 1, 2026
ce33620
bender: Document spatz workspace link
colluca Aug 1, 2026
59718b5
Bump Spatz after removal of IP forks
colluca Aug 1, 2026
beb9123
Rename snitch_lsu to lsu
colluca Aug 1, 2026
f1de889
Fix REUSE lint
colluca Aug 1, 2026
208a5c7
Fix C lint
colluca Aug 1, 2026
1caebbb
Fix width mismatch warnings in Spatz
colluca Aug 1, 2026
b0ec2ab
Fix user width mismatch warning
colluca Aug 1, 2026
fb2eb94
fixup! Fix width mismatch warnings in Spatz
colluca Aug 1, 2026
69e515e
Properly encode Spatz Python package dep for Gwaihir
colluca Aug 1, 2026
aed6fc7
Revert snitch separation from top-level Bender.yml
colluca Aug 1, 2026
a6922e3
Makefile: Remove reqrsp IP tests
colluca Aug 1, 2026
e24f675
Fix Gitlab CI
colluca Aug 1, 2026
4073b46
Introduce separate TRACE flag for tracing
colluca Aug 1, 2026
e8a19cf
Bump reqrsp_interface to fix export_include_dir
colluca Aug 1, 2026
392cc3b
ci: Ensure full history is cloned for merge-base
colluca Aug 1, 2026
fab35c3
tracer: Fix regression from refactoring
colluca Aug 1, 2026
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,8 @@
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0

name: setup-python
description: Install Python dependencies once per job, and cache across jobs
name: setup-container
description: Set up the container's Bender and Python dependencies

runs:
using: "composite"
Expand All @@ -30,6 +30,21 @@ runs:
path: ~/.cache/uv
key: uvcache-${{ hashFiles('uv.lock', '.python-version') }}

# Cache the .bender directory (checked out Bender dependencies)
- name: Cache Bender dependencies
uses: actions/cache@v4
with:
path: .bender
key: bender-${{ hashFiles('Bender.lock') }}

# In container jobs the entrypoint's `bender checkout` runs before
# actions/checkout populates the workspace, so it has no effect here and
# we need to check out Bender dependencies again after checkout.
- name: Checkout Bender dependencies
shell: sh
run: |
bender checkout

- name: Sync Python environment
shell: sh
run: |
Expand Down
96 changes: 82 additions & 14 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -37,13 +37,19 @@ jobs:
# commit on this branch: CI doesn't necessarily run on every push
# (e.g. superseded runs get cancelled), so a plain previous-commit
# diff could silently skip over a real prerequisite change.
#
# On forks, `origin` is the fork itself, whose `main` can lag behind
# the upstream repo it was forked from, so we always fetch
# `main` from the canonical upstream repo instead of `origin`.
run: |
if [ "${{ github.ref_name }}" = "main" ]; then
echo "sha=${{ github.event.before }}" >> "$GITHUB_OUTPUT"
sha="${{ github.event.before }}"
else
git fetch origin main
echo "sha=$(git merge-base origin/main HEAD)" >> "$GITHUB_OUTPUT"
git fetch https://github.com/pulp-platform/snitch_cluster.git main
sha="$(git merge-base FETCH_HEAD HEAD)"
fi
echo "sha=$sha" >> "$GITHUB_OUTPUT"
echo "Base SHA: $sha"

##########################
# Build Docker Container #
Expand Down Expand Up @@ -118,7 +124,7 @@ jobs:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
- name: Build docs
run: make docs

Expand All @@ -133,7 +139,13 @@ jobs:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
# For some reason, the checkout is done by a different user
# than that deploying to Github (root, possibly due to Docker).
# So we need to set the repository as a safe directory.
- name: Git config safe.directory
run: |
git config --global --add safe.directory $GITHUB_WORKSPACE
- name: Generate documentation sources
run: |
make doc-srcs
Expand All @@ -155,7 +167,7 @@ jobs:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
- name: Run pytest
run: pytest

Expand All @@ -173,7 +185,7 @@ jobs:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
- name: Hash Verilator prerequisites
id: list-make-prerequisites
uses: colluca/list-make-prerequisites@v1.0.0
Expand Down Expand Up @@ -203,7 +215,7 @@ jobs:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
- name: Build Software
run: |
make sw -j
Expand Down Expand Up @@ -238,7 +250,7 @@ jobs:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
- name: Hash Verilator prerequisites
id: list-make-prerequisites
uses: colluca/list-make-prerequisites@v1.0.0
Expand All @@ -260,7 +272,7 @@ jobs:
make CFG_OVERRIDE=cfg/mempool.json verilator
- name: Build Software for mempool tests
run: |
make sw CFG_OVERRIDE=cfg/mempool.json SN_MCPU=snitch-mempool -j
make sw CFG_OVERRIDE=cfg/mempool.json -j
- name: Run Tests
run: |
cd test
Expand All @@ -270,7 +282,54 @@ jobs:
# testbench does not wait until all the instructions are retired
# (compiler introduces few instructions after exit routine).
run: |
make SIM_DIR=./test/runs/simple SN_MCPU=snitch-mempool DEBUG=ON annotate -j
make SIM_DIR=./test/runs/simple DEBUG=ON annotate -j

######################################################
# Simulate SW on Snitch Cluster (Spatz) w/ Verilator #
######################################################

snitch-spatz-cluster-vlt:
name: Build and Simulate Spatz Snitch Cluster w/ Verilator
runs-on: ubuntu-22.04
needs: [docker-meta, build-hw-image]
container:
image: ${{ needs.docker-meta.outputs.hw_image_name }}
volumes:
- ${{ github.workspace }}:/repo
defaults:
run:
working-directory: /repo
steps:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-container
- name: Hash Verilator prerequisites
id: list-make-prerequisites
uses: colluca/list-make-prerequisites@v1.0.0
with:
target: verilator
flags: --recursive
- name: Set up cache for Verilator build
id: verilator-cache
uses: actions/cache@v4
with:
path: |
/repo/target/sim/build/bin
key: verilator-spatz-${{ steps.list-make-prerequisites.outputs.hash }}
restore-keys: |
verilator-spatz-
- name: Build Hardware
if: steps.verilator-cache.outputs.cache-hit != 'true'
run: |
make CFG_OVERRIDE=cfg/spatz.json verilator
- name: Build Software
run: |
make CFG_OVERRIDE=cfg/spatz.json sw -j
- name: Run Tests
run: |
cd test
../util/experiments/run.py spatz.yaml --simulator verilator -j

#############
# Synthesis #
Expand All @@ -292,10 +351,10 @@ jobs:
with:
submodules: 'recursive'
fetch-depth: 0
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
- name: Check if Yosys prerequisites changed
id: make-prerequisites-changed
uses: colluca/make-prerequisites-changed@v1.1.1
uses: colluca/make-prerequisites-changed@v1.2.0
with:
target: yosys
flags: --recursive
Expand All @@ -304,6 +363,15 @@ jobs:
if: steps.make-prerequisites-changed.outputs.changed == 'true'
run: |
make CFG_OVERRIDE=cfg/yosys-ci.json yosys
- name: Upload Yosys logs
if: failure()
uses: actions/upload-artifact@v4
with:
name: yosys-synthesis-logs
path: |
target/asic/yosys/*.log
target/asic/yosys/reports/
if-no-files-found: warn

######################
# Sources Up-to-Date #
Expand All @@ -324,7 +392,7 @@ jobs:
- uses: actions/checkout@v4
with:
submodules: 'recursive'
- uses: ./.github/actions/setup-python
- uses: ./.github/actions/setup-container
- name: Generate opcodes
run: |
./util/clustergen/generate-opcodes.sh
Expand Down
3 changes: 2 additions & 1 deletion .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,8 @@
!/nonfree/util/.gitignore
.cockpitgroup

# Dependency files
# Dependencies
/deps
/.bender/

# Modelsim files
Expand Down
30 changes: 18 additions & 12 deletions .gitlab-ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@

variables:
GIT_STRATEGY: clone
GIT_DEPTH: 0
# Enable colors in CI terminal
TERM: ansi
FORCE_COLOR: 1
Expand Down Expand Up @@ -108,12 +109,9 @@ snitch-ip-tests:
- snitch_cluster
- tcdm_interface
- snitch_ssr
- reqrsp_interface
script:
- make rtl -j
- cd hw/$IP
- ./util/compile.sh
- ./util/run_vsim.sh
- make test-$IP

####################
# Simulation tests #
Expand All @@ -123,15 +121,15 @@ snitch-ip-tests:
snitch-cluster-vlt:
needs: [snitch-cluster-sw]
script:
- make verilator
- make verilator TRACE=OFF -j
- cd test
- ../util/experiments/run.py run.yaml --simulator verilator -j --run-dir runs/vlt

# VCS
snitch-cluster-vcs:
needs: [snitch-cluster-sw]
script:
- make vcs
- make vcs TRACE=OFF -j
- cd test
- ../util/experiments/run.py run.yaml --simulator vcs -j --run-dir runs/vcs

Expand Down Expand Up @@ -164,42 +162,50 @@ snitch-cluster-vsim:
snitch-cluster-omega-vsim:
script:
- make CFG_OVERRIDE=cfg/omega.json sw -j
- make vsim -j
- make vsim TRACE=OFF -j
- cd test
- ../util/experiments/run.py run.yaml --simulator vsim -j --run-dir runs/vsim

# Test Multi-channel DMA
snitch-cluster-mchan-vsim:
script:
- make CFG_OVERRIDE=cfg/dma_mchan.json sw -j
- make vsim -j
- make vsim TRACE=OFF -j
- cd test
- ../util/experiments/run.py dma_mchan.yaml --simulator vsim -j --run-dir runs/vsim

# Test Mempool configuration
snitch-cluster-mempool-vsim:
script:
- make CFG_OVERRIDE=cfg/mempool.json SN_MCPU=snitch-mempool sw -j
- make CFG_OVERRIDE=cfg/mempool.json sw -j
- make vsim -j
- cd test
- ../util/experiments/run.py mempool.yaml --simulator vsim -j --run-dir runs/vsim
- make -C .. SIM_DIR=$PWD/runs/vsim/simple SN_MCPU=snitch-mempool annotate -j
- make -C .. SIM_DIR=$PWD/runs/vsim/simple annotate -j

# Additional tests for different FREP configurations
snitch-cluster-frep-vsim:
script:
# Large FREP configuration
- make CFG_OVERRIDE=cfg/frep_xl.json sw -j
- make vsim -j
- make vsim TRACE=OFF -j
- cd test
- ../util/experiments/run.py frep_xl.yaml --simulator vsim -j --run-dir runs/vsim
- cd -
# Small FREP configuration
- make CFG_OVERRIDE=cfg/frep_xs.json sw -j
- make vsim -j
- make vsim TRACE=OFF -j
- cd test
- ../util/experiments/run.py frep_xs.yaml --simulator vsim -j --run-dir runs/vsim

# Test Spatz configuration
snitch-cluster-spatz-vsim:
script:
- make CFG_OVERRIDE=cfg/spatz.json sw -j
- make vsim TRACE=OFF -j
- cd test
- ../util/experiments/run.py spatz.yaml --simulator vsim -j --run-dir runs/vsim

# COPIFT experiments
snitch-cluster-copift-vsim:
script:
Expand Down
36 changes: 36 additions & 0 deletions Bender.lock
Original file line number Diff line number Diff line change
Expand Up @@ -55,6 +55,22 @@ packages:
source:
Git: https://github.com/pulp-platform/common_verification.git
dependencies: []
core_ips:
revision: e1a85a7f72d0d799dd9ecc4deb40e2e41969b88e
version: null
source:
Git: https://github.com/colluca/core_ips.git
dependencies:
- axi
- common_cells
- reqrsp_interface
core_v_xif:
revision: fad32c62f07ec7304a7169640eaf946da3727f77
version: null
source:
Git: https://github.com/pulp-platform/core-v-xif.git
dependencies:
- common_cells
fpnew:
revision: 46cb33a4ce6b04b83ec38ebd288dd58a031a6390
version: null
Expand Down Expand Up @@ -101,6 +117,15 @@ packages:
- axi
- common_cells
- common_verification
reqrsp_interface:
revision: 521f457d754471d9174d27c7c6c6c3892f3387a2
version: null
source:
Git: https://github.com/colluca/reqrsp_interface.git
dependencies:
- axi
- common_cells
- tech_cells_generic
riscv-dbg:
revision: 358f90110220adf7a083f8b65d157e836d706236
version: 0.8.1
Expand All @@ -116,6 +141,17 @@ packages:
Git: https://github.com/pulp-platform/scm.git
dependencies:
- tech_cells_generic
spatz_vpu:
revision: 0266c93f3e660db0d2eb756a00fa622b9076ddd9
version: null
source:
Git: https://github.com/pulp-platform/spatz_vpu.git
dependencies:
- common_cells
- core_ips
- fpnew
- reqrsp_interface
- tech_cells_generic
tech_cells_generic:
revision: 3a3de73632a06826b1bd9c65a0a2e92b32016845
version: 0.2.14
Expand Down
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