Regs/Transpose: Add compute parameter register to register frontend and fix transpose to/from misaligned addresses - #160
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- `compute_cfg` register is added after existing registers - Controls `enable`, `op`, `mode`, `tensor_m` and `tensor_n` - Connected to the relevant fields of the ND request struct in the register top-level template - Add required additional frontend IDs to CI deploy job
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Merge order:
This PR is based on the PR making the compute engine instantiation an elaboration-time parameter instead of a generation-time one, see #159 - that PR should be merged before this one.
Changes:
deployjob (IDMA_ADD_FE_IDS)ready_itow_dp_req_readyinstead ofwrite_beat_done; that signal is asserted on the last transaction of a write transfer, which is the correct behavior.