Fix spelling typos flagged by misspell linter

include/onnxruntime/core/providers/cann/cann_provider_options.h

@@ -16,7 +16,7 @@ struct OrtCANNProviderOptions {
   int enable_cann_graph;                                   // Flag indicating if prioritizing the use of
                                                            // CANN's graph-running capabilities
   int enable_cann_subgraph;                                // Flag indicating whether to generate subgraph
-                                                           // automaticly
+                                                           // automatically
   int dump_graphs;                                         // Flag indicating if dumping graphs
   int dump_om_model;                                       // Flag indicating if dumping om model
   std::string precision_mode;                              // Operator Precision Mode

include/onnxruntime/ep/adapter/kernel_registry.h

@@ -69,7 +69,7 @@ struct KernelRegistry {
       // - `OrtEpApi::CreateLoopKernel`
       // - `OrtEpApi::CreateScanKernel`
       //
-      // If the kernel being created is one of the control flow kernels, `CreateControlFlowKernelImpl` should be overriden
+      // If the kernel being created is one of the control flow kernels, `CreateControlFlowKernelImpl` should be overridden
       // to write the value of `out` to the created `OrtKernelImpl`, and the returned status should be OK.
       status = kernel->CreateControlFlowKernelImpl(info, out);
       if (!status.IsOK()) {

onnxruntime/contrib_ops/cuda/fused_conv.cc

@@ -193,7 +193,7 @@ class FusedConv : public onnxruntime::cuda::CudaKernel {
         // especially for EXHAUSTIVE algo search which may result in a better algo selection.
         // ORTModule uses different algo search options (HEURISTIC, and use max workspace size) compared to
         // inference build (EXHAUSTIVE, 32M workspace size). We observed better perf when we pad input shape
-        // [N,C,D] to [N,C,1,D], expecially on A100, and especially for ConvGrad.
+        // [N,C,D] to [N,C,1,D], especially on A100, and especially for ConvGrad.
         // PyTorch also pads to [N,C,1,D]. For inference build, we still pad it to [N, C, D, 1] as this seems
         // to be the sweet spot for all algo search options: EXHAUSTIVE, HEURISTIC, and DEFAULT.
         // See PR #7348 and #7702 for more context.

onnxruntime/contrib_ops/cuda/llm/cutlass_extensions/gemm/kernel/fused_moe_kernel.cuh

@@ -66,8 +66,8 @@ struct Fused_Moe_Kernel_sm80 {
                                        : BaseKernelTraits::kSmemSize;
   static constexpr int kThreadCount = BaseKernelTraits::kThreadCount;
 
-  static constexpr bool can_implement(int const avaliable_smem_size) {
-    return BaseKernelTraits::can_implement(avaliable_smem_size);
+  static constexpr bool can_implement(int const available_smem_size) {
+    return BaseKernelTraits::can_implement(available_smem_size);
   }
 
   static Params to_underlying_arguments(Arguments const& args) {

onnxruntime/contrib_ops/cuda/llm/cutlass_extensions/gemm/kernel/fused_moe_kernel_traits.cuh

@@ -187,8 +187,8 @@ struct Fused_Moe_Kernel_traits_sm80 {
 
   static constexpr int kSmemSize = static_cast<int>(sizeof(SharedStorage));
 
-  static constexpr bool can_implement(int const avaliable_smem_size) {
-    return avaliable_smem_size > kSmemSize;
+  static constexpr bool can_implement(int const available_smem_size) {
+    return available_smem_size > kSmemSize;
   }
 
   // #endif

onnxruntime/contrib_ops/webgpu/moe/final_mix.wgsl.template

@@ -12,7 +12,7 @@
 $MAIN {
     let token_idx = expert_tokens.getByOffset(workgroup_idx);
     // token_idx is the offset into hidden state while fc2_outputs is for the chunk so
-    // we need to substract uniforms.token_offset
+    // we need to subtract uniforms.token_offset
     let router_value_offset = (token_idx - uniforms.token_offset) * uniforms.num_experts + uniforms.expert_idx;
     let router_value = router_values.getByOffset(router_value_offset);
     let fc2_outputs_offset = workgroup_idx * uniforms.hidden_size;

onnxruntime/core/graph/graph_utils.h

@@ -82,7 +82,7 @@ NodeArg& AddInitializerWithOrtValue(Graph& graph, const ONNX_NAMESPACE::TensorPr
 /// <param name="dst_graph">destination</param>
 /// <param name="name">initializers name</param>
 /// <param name="copy_in_memory_data ">if external data is in memory, copy data inline.
-///  default is false. This is to accomodate EPs who load initializers on their own and do not understand
+///  default is false. This is to accommodate EPs who load initializers on their own and do not understand
 ///          our /*/_ORT_MEM_ADDR_/*/ external data reference</param>
 void MakeInitializerCopyIfNotExist(const Graph& src_graph, Graph& dst_graph, const std::string& name,
                                    bool copy_in_memory_data = false);

onnxruntime/core/mlas/lib/qlutgemm.cpp

@@ -454,7 +454,7 @@ MlasLutGemm(
      *
      * Currently, we only support FP32, add FP16 support later which requires conversion buffer
      *
-     * LUT Buffer for FP32 : K * M * 4 * sizeof(uint8_t) bytes + lut_scale_size * m * 2 * sizeof(float) bytes  + allignment
+     * LUT Buffer for FP32 : K * M * 4 * sizeof(uint8_t) bytes + lut_scale_size * m * 2 * sizeof(float) bytes  + alignment
      *
      */
 

onnxruntime/core/mlas/lib/s390x/qgemm_kernel_zvector.cpp

@@ -1027,7 +1027,7 @@ xvi8ger4pp_impl(
     const __vector unsigned char maskb = { 0, 4, 8, 12, 1, 5, 9, 13, 2, 6, 10, 14, 3, 7, 11, 15 };
 
     __vector int va_interim[4];
-    __vector unsigned char vb_interm = vec_perm(vb, vb, maskb);
+    __vector unsigned char vb_interim = vec_perm(vb, vb, maskb);
 
     __vector int va_prep;
     __vector int vb_prep[4];
@@ -1037,10 +1037,10 @@ xvi8ger4pp_impl(
     va_interim[2] = (__vector int) vec_unpackh(vec_unpackl((__vector signed char) va));
     va_interim[3] = (__vector int) vec_unpackl(vec_unpackl((__vector signed char) va));
 
-    vb_prep[0] = (__vector int) vec_unpackh(vec_unpackh(vb_interm));
-    vb_prep[1] = (__vector int) vec_unpackl(vec_unpackh(vb_interm));
-    vb_prep[2] = (__vector int) vec_unpackh(vec_unpackl(vb_interm));
-    vb_prep[3] = (__vector int) vec_unpackl(vec_unpackl(vb_interm));
+    vb_prep[0] = (__vector int) vec_unpackh(vec_unpackh(vb_interim));
+    vb_prep[1] = (__vector int) vec_unpackl(vec_unpackh(vb_interim));
+    vb_prep[2] = (__vector int) vec_unpackh(vec_unpackl(vb_interim));
+    vb_prep[3] = (__vector int) vec_unpackl(vec_unpackl(vb_interim));
 
     for (size_t i = 0; i < 4; ++i)
     {

onnxruntime/core/providers/coreml/builders/impl/normalization_op_builder.cc

@@ -203,7 +203,7 @@ bool NormalizationOpBuilder::IsOpSupportedImpl(const Node& node, const OpBuilder
   // Type of Mean and InvStdDev. This also specifies stage one’s computation precision.
   //  if stash_type is 1, this operator casts all input variables to 32-bit float,
   // perform the computation, and finally cast Normalized back to the original type of X
-  // coreml didn't have a similiar attribute to stash_type, for now, we support the default value
+  // coreml didn't have a similar attribute to stash_type, for now, we support the default value
   if (node.OpType() != "InstanceNormalization") {
     NodeAttrHelper helper(node);
     const auto stash_type = helper.Get("stash_type", 1);

onnxruntime/core/providers/cpu/ml/tree_ensemble_attribute.h

@@ -234,7 +234,7 @@ struct TreeEnsembleAttributesV5 {
   std::vector<int64_t> tree_roots;
 
  private:
-  // `membership_values` are seperated by NAN for different nodes
+  // `membership_values` are separated by NAN for different nodes
   // It is more convenient to preserve the values for each node in a vector
   // The vector would be empty for nodes that are not `BRANCH_MEMBER`
   void getMembershipValuesById(std::vector<std::vector<ThresholdType>>& membership_values_by_id) const {

onnxruntime/core/providers/cuda/nn/conv.cc

@@ -475,7 +475,7 @@ Status Conv<T, Layout>::ComputeInternal(OpKernelContext* context) const {
   if (s_.bias_fused && s_.z_data != nullptr) {
     s_.variant_pack.insert_or_assign(s_.cudnn_fe_Z, const_cast<void*>(s_.z_data));
     if (Layout == LAYOUT_NCHW && s_.z_data == s_.y_data) {
-      // memset Z if it's required for a succesful fusion
+      // memset Z if it's required for a successful fusion
       CUDA_RETURN_IF_ERROR(cudaMemset(s_.y_data, 0, s_.Y->SizeInBytes()));
     }
   }

onnxruntime/core/providers/cuda/nn/conv_transpose.cc

@@ -447,7 +447,7 @@ Status ConvTranspose<T, Layout>::UpdateState(OpKernelContext* context, bool dyna
       // especially for EXHAUSTIVE algo search which may result in a better algo selection.
       // ORTModule uses different algo search options (HEURISTIC, and use max workspace size) compared to
       // inference build (EXHAUSTIVE, 32M workspace size). We observed better perf when we pad input shape
-      // [N,C,D] to [N,C,1,D], expecially on A100, and especially for ConvGrad.
+      // [N,C,D] to [N,C,1,D], especially on A100, and especially for ConvGrad.
       // PyTorch also pads to [N,C,1,D]. For inference build, we still pad it to [N, C, D, 1] as this seems
       // to be the sweet spot for all algo search options: EXHAUSTIVE, HEURISTIC, and DEFAULT.
       // See PR #7348 and #7702 for more context.
@@ -540,7 +540,7 @@ Status ConvTranspose<T, Layout>::DoConvTranspose(OpKernelContext* context, bool
   if (s_.bias_fused && s_.z_data != nullptr) {
     s_.variant_pack.insert_or_assign(s_.cudnn_fe_Z, const_cast<void*>(s_.z_data));
     if (Layout == LAYOUT_NCHW && s_.z_data == s_.y_data) {
-      // memset Z if it's required for a succesful fusion
+      // memset Z if it's required for a successful fusion
       CUDA_RETURN_IF_ERROR(cudaMemset(s_.y_data, 0, s_.Y->SizeInBytes()));
     }
   }

onnxruntime/core/providers/migraphx/migraphx_provider_factory.cc

@@ -177,7 +177,7 @@ struct MIGraphX_Provider final : Provider {
       std::vector<wchar_t> pathBuf;
       for (;;) {
         pathBuf.resize(pathBuf.size() + MAX_PATH);
-        if (const auto writen = GetModuleFileNameW(module, pathBuf.data(), static_cast<DWORD>(pathBuf.size())); writen < pathBuf.size()) {
+        if (const auto written = GetModuleFileNameW(module, pathBuf.data(), static_cast<DWORD>(pathBuf.size())); written < pathBuf.size()) {
           break;
         }
       }

onnxruntime/core/providers/partitioning_utils.cc

@@ -198,10 +198,10 @@ std::vector<std::vector<const Node*>> CreateSupportedPartitionNodeGroups(
         }
 
         supported_group.push_back(&node);
-        const Node* redundent_clip_node = node_unit->GetRedundantClipNode();
-        if (redundent_clip_node) {
-          supported_group.push_back(redundent_clip_node);
-          supported_group_border.erase(redundent_clip_node);
+        const Node* redundant_clip_node = node_unit->GetRedundantClipNode();
+        if (redundant_clip_node) {
+          supported_group.push_back(redundant_clip_node);
+          supported_group_border.erase(redundant_clip_node);
         }
 
         for (const auto& q : node_unit->GetQNodes()) {

onnxruntime/core/providers/qnn/builder/opbuilder/lstm_op_builder.cc

@@ -48,9 +48,9 @@ class LSTMOpBuilder : public BaseOpBuilder {
                 initial_h.shape = Y_h.shape = initial_c.shape = Y_c.shape = [batch_size, num_directions, hidden_size].
 
   ONNX LSTM optional outputs:
-  out[0]: Y [seq_length, num_directions, batch_size, hidden_size] = stack of out[0] from QNN_LSTM with varient directions
-  out[1]: Y_h [num_directions, batch_size, hidden_size] = stack of out[2] from QNN_LSTM with varient directions
-  out[2]: Y_c [num_directions, batch_size, hidden_size] = stack of out[1] from QNN_LSTM with varient directions
+  out[0]: Y [seq_length, num_directions, batch_size, hidden_size] = stack of out[0] from QNN_LSTM with variant directions
+  out[1]: Y_h [num_directions, batch_size, hidden_size] = stack of out[2] from QNN_LSTM with variant directions
+  out[2]: Y_c [num_directions, batch_size, hidden_size] = stack of out[1] from QNN_LSTM with variant directions
 
   QNN LSTM inputs:
   in[0]: x_t: 2D of shape [batch_size, input_size] or

onnxruntime/core/providers/tensorrt/tensorrt_execution_provider.cc

@@ -1323,7 +1323,7 @@ std::vector<nvinfer1::PreviewFeature> ParseTrtPreviewFeatures(const std::string&
     if (featureName == "ALIASED_PLUGIN_IO_10_03") {
       previewFeatures.push_back(nvinfer1::PreviewFeature::kALIASED_PLUGIN_IO_10_03);
     } else {
-      throw std::invalid_argument(std::string("Unkown or unsupported preview feature: ") + featureName);
+      throw std::invalid_argument(std::string("Unknown or unsupported preview feature: ") + featureName);
     }
   }
 

onnxruntime/core/providers/vitisai/vitisai_execution_provider.h

@@ -41,7 +41,7 @@ class VitisAIExecutionProvider : public IExecutionProvider {
   std::unique_ptr<profiling::EpProfiler> GetProfiler() override;
 
   // This method is called after both `GetComputeCapabilityOps()` and `Compile()`.
-  // This timing is required to work with both compliation-based EPs and non-compilation-based EPs.
+  // This timing is required to work with both compilation-based EPs and non-compilation-based EPs.
   const InlinedVector<const Node*> GetEpContextNodes() const override;
   uint32_t GetEpContextDataCallbackRequirements(const GraphViewer& graph_viewer) const override;
   virtual common::Status SetEpDynamicOptions(gsl::span<const char* const> /*keys*/,

onnxruntime/core/providers/webgpu/program_manager.cc

@@ -383,7 +383,7 @@ Status ProgramManager::Build(const ProgramBase& program,
 
   // TODO: a new cache hierarchy for constants.
   //
-  // Explaination:
+  // Explanation:
   // Currently, we use Uniforms for dynamic data. This helps to reduce the number of program artifacts.
   //
   // "dynamic data" here means the data the determined at runtime, such as the shape of the input tensor.
@@ -401,7 +401,7 @@ Status ProgramManager::Build(const ProgramBase& program,
   size_t constant_count = program.OverridableConstants().size();
 
   // making a copy of the constant names is required because they are stored as std::string_view in the program
-  // metadata. A value of std::string_view is not guaranteed to be a C-stlye string (null-terminated) and hence
+  // metadata. A value of std::string_view is not guaranteed to be a C-style string (null-terminated) and hence
   // cannot be used directly in the WebGPU API (which expects a const char*).
   std::vector<std::string> constant_names;
   constant_names.reserve(constant_count);

onnxruntime/core/providers/webgpu/shader_helper.h

@@ -34,7 +34,7 @@ class ShaderHelper final {
   //       - constants are defined as "const a:f32 = 1.0;". It's hard coded in the shader.
   //       - overridable constants are defined as "override a:f32 = 1.0;"  (may override or not)
   //                                           or "override b:u32;"        (must override)
-  //         the value can be overriden by pipeline creation config.
+  //         the value can be overridden by pipeline creation config.
   //
   // **
   // ** section: inputs and outputs
@@ -152,7 +152,7 @@ class ShaderHelper final {
   // Generate source code.
   //
   // This function:
-  // - performs validation if neccessary,
+  // - performs validation if necessary,
   // - appends the ranks for variables to the shape_uniform_ranks.
   //   (The rank value is zero if no uniform is needed for the variable.)
   // - generates the final source code.

onnxruntime/core/providers/webnn/builders/impl/expand_op_builder.cc

@@ -71,7 +71,7 @@ bool ExpandOpBuilder::IsOpSupportedImpl(const GraphViewer& graph_viewer,
   const auto& input_defs = node.InputDefs();
   const auto& shape_name = input_defs[1]->Name();
 
-  // We need a constant which can not be overriden by input
+  // We need a constant which can not be overridden by input
   const auto* shape_init = graph_viewer.GetConstantInitializer(shape_name);
   if (!shape_init) {
     LOGS(logger, VERBOSE) << "The shape must be a constant initializer.";

onnxruntime/python/tools/qnn/preprocess.py

@@ -106,7 +106,7 @@ def qnn_preprocess_model(
     """Preprocess ONNX model for QNN.
 
     Args:
-        model_input: A path or ONNX ModelProto specifiying the model to be preprocessed.
+        model_input: A path or ONNX ModelProto specifying the model to be preprocessed.
         model_output: A path specifying where the preprocessed model to be saved.
         fuse_layernorm: A bool specifying whether to fuse the matched sequence into a single LayerNormalization node.
             Defaults to False.

onnxruntime/python/tools/transformers/models/stable_diffusion/README.md

@@ -147,7 +147,7 @@ conda activate py310
 
 First, we need install CUDA 12.x, [cuDNN](https://docs.nvidia.com/deeplearning/cudnn/install-guide/index.html), and [TensorRT](https://docs.nvidia.com/deeplearning/tensorrt/install-guide/index.html) in the machine.
 
-The verison of CuDNN can be found in https://onnxruntime.ai/docs/execution-providers/CUDA-ExecutionProvider.html#requirements.
+The version of CuDNN can be found in https://onnxruntime.ai/docs/execution-providers/CUDA-ExecutionProvider.html#requirements.
 The version of TensorRT can be found in https://onnxruntime.ai/docs/execution-providers/TensorRT-ExecutionProvider.html#requirements.
 
 #### CUDA 12.*:

onnxruntime/test/framework/allocation_planner_test.cc

@@ -103,7 +103,7 @@ class AllocationPlanTestUtility {
       EXPECT_EQ(plan.allocation_plan[i].alloc_kind, expected[i]) << "Error in allocation kind at position " << i;
     }
   }
-  // The free list has been re-implmented.
+  // The free list has been re-implemented.
   // remove those checkers first.
   // TODO: add the tests for new release plan.
 };

onnxruntime/test/python/onnxruntime_test_python_ort_parallel.py

@@ -138,7 +138,7 @@ def run_inference_with_parallel_execution_mode(self, ep, num_device):
                 if time.time() - t_time < hang_time:
                     continue
                 else:
-                    print("Hang occured, ending test")
+                    print("Hang occurred, ending test")
                     exit(1)
             if threads_complete[0] == num_threads:
                 break

onnxruntime/test/shared_lib/test_model_builder_api.cc

@@ -81,7 +81,7 @@ OrtNode* CreateNode(const OrtModelEditorApi& api,
   return node;
 }
 
-// convenience func to convert initalizer lists to gsl::span
+// convenience func to convert initializer lists to gsl::span
 OrtNode* CreateNode(const OrtModelEditorApi& api,
                     const char* operator_name, const char* node_name,
                     const std::initializer_list<const char*> input_names,

pyproject.toml

@@ -69,7 +69,7 @@ ignore = [
     "SIM108", # We don't encourage ternary operators
     "SIM114", # Don't combine if branches for debugability
     "SIM116", # Don't use dict lookup to replace if-else
-    "UP038", # Using X | Y in isinstance checks is a little aggresive
+    "UP038", # Using X | Y in isinstance checks is a little aggressive
 ]
 
 [tool.ruff.lint.per-file-ignores]