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Improve RSP accuracy by backporting changes from simple64#17

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Rosalie241:rsp-fixes
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Improve RSP accuracy by backporting changes from simple64#17
Rosalie241 wants to merge 1 commit into
libretro:masterfrom
Rosalie241:rsp-fixes

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This fixes all RSP tests with the interpreter, a LLE video plugin & parallel RSP:

[CORE]  IS64: n64-systemtest 2.1.0 (base=1 timing=0 cycle=0 cp0-hazards=0)
[CORE]  IS64: Finished in 4.28s. Base: Failed 0 of 305 tests (100% success rate)
[CORE]  IS64: 
[CORE]  IS64: Slowest tests: RSP VRSQ (all 16 bit values) (0.25s), RSP VRCP (all 16 bit values) (0.24s), RSP VLT (0.09s), RSP VGE (0.09s), RSP VADD (0.09s)

n64-systemtest-rsp.zip

This also requires a mupen64plus-core patch: mupen64plus/mupen64plus-core#1153

LibretroAdmin added a commit to libretro/parallel-n64 that referenced this pull request Jun 9, 2026
Backports the RSP accuracy improvements from libretro/parallel-rsp#17
(by Rosalie241, originally from simple64) into the vendored
mupen64plus-rsp-paraLLEl.

  - rsp_dma_read/rsp_dma_write: rewrite length/count/skip handling
    (length = ((len & 0xFFF) | 7) + 1, skip masked 0xFF8, count + 1,
    DMA_CACHE & 0x1ff8, DMA_DRAM & 0xfffff8, loop ++i < count).
  - SP_STATUS write: per-bit SP_SET_/SP_CLR_ handling.
  - DPC register logic: rdp_status_write(), CMD_START/CMD_END with
    DPC_STATUS_START_VALID, semaphore-write-zeros.
  - Replace the MFC0_count timeout mechanism with the SP_SEMAPHORE
    path; add a MODE_EXIT run-loop exit (parallel.cpp / rsp_jit.cpp).

Passes all 305 n64-systemtest RSP tests (interpreter, LLE video,
parallel RSP), per the upstream PR.

The local rsp_jit.cpp uint16_t(imm) immediate fix is preserved.

NOTE: the upstream PR also wants a companion mupen64plus-core change
(mupen64plus/mupen64plus-core#1153). The parallel-n64 core may need a
matching adjustment for the new DPC START_VALID / CMD handshake.
LibretroAdmin added a commit to libretro/parallel-n64 that referenced this pull request Jun 9, 2026
Backports the rsp_dma_read/rsp_dma_write correctness change from
libretro/parallel-rsp#17 (by Rosalie241, originally from simple64):

  - length = ((len & 0xFFF) | 7) + 1   (round up to 8, matches HW)
  - skip   = (len >> 20) & 0xFF8        (8-byte aligned skip)
  - count  = ((len >> 12) & 0xFF) + 1   with loop bound ++i < count
  - DMA_CACHE masked & 0x1ff8, DMA_DRAM masked & 0xfffff8 at write time
    (replaces the old post-hoc &= ~0x3 / &= ~0x7 alignment)

This is the subset of PR #17 that is safe for parallel-n64. It is
behaviourally identical for aligned transfers (verified byte-identical
RDRAM on Killer Instinct Gold and Pokemon Snap vs the pre-patch core,
parallel RSP) and only differs for the misaligned skip/address edge
cases exercised by n64-systemtest.

The remainder of PR #17 is intentionally NOT backported: the ls.cpp
'precedence' edits are no-ops (+ already binds tighter than & in C),
the per-bit SP_STATUS rewrite and the DPC START_VALID handshake are
behaviourally equivalent to the existing code for normal task
sequences, and the cooperative MODE_EXIT yield model is incompatible
with parallel-n64's run-to-completion RSP core (it was the cause of
the Killer Instinct Gold black screen that prompted the revert).
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