Skip to content

Project Fission: A Unified Semantic Engine - #176

Open
sjkim1127 wants to merge 37 commits into
mainfrom
codex/fsl-jvm-iadd-parity
Open

sjkim1127 wants to merge 37 commits into
mainfrom
codex/fsl-jvm-iadd-parity

Conversation

@sjkim1127

@sjkim1127 sjkim1127 commented Sep 30, 2026 •

Copy link
Copy Markdown
Contributor

Direction

Experimental fission-fsl with one canonical typed FIR and multiple output projections. Accuracy and behavioral recompilation are the priorities. The successor architecture does not split NIR/HIR. The long-term goal is Fission integration and replacement of the Sleigh dependency across CPU, GPU and VM targets.

Keep this PR open for research development; merge is a later decision. Product changes stay on codex/fsl-jvm-iadd-parity.

Implemented scope

  • Text .fsl compiles to validated typed FIR and a versioned binary .fslc package. JSON remains comparison/evidence output.
  • The same FIR supports reference evaluation, diagnostic output, C and Rust projections. SSA, operand types, ordered effects and required state capacity are validated before mutation.
  • Portable decode/reencode supports fixed widths 8/32/64/128, masks, contiguous fields and excluded selectors. Cranelift JIT/AOT decoder/lifter generation remains limited to exact single-byte opcodes and is separate from guest execution.
  • Preserve the earlier JVM iadd, integer/stack execution slice and 128-bit Sleigh context support.
  • GFX900 includes four original encoding rules plus a coherent SOP2 register-only encoding profile. Unsupported semantics remain explicit.
  • Separate executable GFX900 profiles support s_add_u32 and s_addc_u32: SGPR reads/writes, SCC reads/writes, wrapped sum and unsigned carry. Carry-input operations require package v4; older v1/v2/v3 remain readable.
  • Own .fslabi text grammar and typed parser preserve the admitted BPF/eBPF cspec metadata. Register identities link to the new byte layout; parameter allocation is still unsupported.
  • One little-endian eBPF ADD64 register leaf is migrated from pinned Sleigh source into executable FSL. The reference example checks that leaf against the existing SLA runtime.

Validation at cfcb0e0

  • 17 fission-fsl tests passed with no skips; formatting and Clippy with warnings denied passed.
  • Earlier integer/stack regression: 1,920 inputs, 7,680 C/Rust O0/O2 comparisons passed again.
  • s_add_u32: 1,030 states and 4,120 C/Rust O0/O2 comparisons passed.
  • Carry-input FIR widths 1/8/16/32/64: 5,150 states and 20,600 C/Rust O0/O2 comparisons against independent widened-sum calculations. Only the 32-bit profile is GFX900 evidence (1,030 states / 4,120 comparisons); other widths are synthetic primitive checks.
  • s_add_u32 followed by s_addc_u32: 1,060 reference-evaluator 64-bit sums. This does not establish recompilation of the two-instruction sequence.
  • Migrated eBPF leaf: 484 states / 1,936 C/Rust O0/O2 comparisons, including register aliasing and unchanged unused encoding fields. Legacy SLA oracle: 121 register combinations with byte/length, register-binding and 64-bit IntAdd-template checks. This oracle shares source lineage.
  • ABI parsing verifies ordered register entries, units, cleanup and preserved/output effects, and rejects unsupported declarations. The research importer admits 2 of 110 cspec files and records refusal reasons for 108.
  • CLI state execution and local LLVM encoding observation of s_addc_u32 s2, s0, s1 (00 01 02 82) passed.

Reproduction tools and source/license provenance live in the separate fission-research repository. Existing nine historical artifacts and four migration artifacts were reproduced locally; CI pins this Fission compiler commit and the original input snapshot separately.

Limits and next gates

This is an instruction-level research prototype. Whole-function CFG, general memory, traps/exceptions, kernel ABI and whole-program equivalence remain unsupported. No GPU hardware execution, decompilation-quality or speed advantage is claimed.

The first wave64 masked-add contract is now executable; EXEC writes, VCC operations, divergence, memory and barriers remain unsupported. The scalar and broadcast profiles restrict selectors to SGPR0..95; literals, inline constants and special registers remain unsupported.

The source importer admits an explicit eBPF entry/token/binding/constructor shape, not a general Sleigh preprocessor/compiler. A bounded direct SLA decision/BUILD/export/INT_ADD branch is migrated; general context/dynamic/control-flow lowering is unsupported. ABI metadata now has register linking; parameter allocation, call execution and binary ABI packaging remain unsupported. The eBPF source R10 binding is retained without claiming verifier legality of writing it.

Current encoding limits include one fixed instruction width per profile, at most 256 rules, contiguous fields up to 64 bits, no conditional extension words, split fields or compaction. NVIDIA/Intel corpus support is not established. C callers must provide valid storage and obey documented disjoint-storage contracts.

Wave64 update at 0bc0efb

  • Canonical FIR adds explicit lane-mask snapshots, lane register reads and masked writes. WaveContract derives uniform/mask/lane domains from typed producers; masks cannot enter integer arithmetic and lane values cannot enter uniform effects. Existing wrapping addition broadcasts uniform inputs.
  • Two FSL VOP2 e32 patterns implement GFX900 v_add_u32: VGPR/VGPR and SGPR0..95 broadcast/VGPR. VGPR selectors span 0..255. No architecture/mnemonic executor dispatch was introduced.
  • Package v5 stores these effects; v1..v4 remain readable. Historical scalar/stack package emission and SOP2 hashes remain unchanged.
  • execute_wave, the execute-wave CLI, and C/Rust projections validate every precondition before effects. Inactive lane bit patterns and unrelated scalar/flag/EXEC state are preserved. Scalar effects execute once even at EXEC=0.
  • 22 crate tests passed locally. Wave64 has 1,984 valid states + 19 invalid output rows, 8,012 C/Rust O0/O2 comparisons against independent full-state expectations. A separate four-lane generic contract adds 4 rows / 16 comparisons for out-of-range masks, scalar execution and rejection before mutation. Formatting and Clippy with warnings denied passed.
  • Research encoding oracle: LLVM-generated 128 cases, 128 field comparisons, 128 unchanged roundtrips, 128 edited reassembly checks and 9 refusals. Source/package/corpus hashes are locked. LLVM supplies encoding evidence only.
  • Two LLVM-compiled AMDGPU kernel slices also supply actual ELF instruction rows (VGPR and SGPR-broadcast inputs). Object bytes/disassembler/FSL fields and six synthetic reference-CLI states agree. This does not execute the kernels or their remaining instructions. The research CI runs this probe with LLVM 18.
  • Maximum VGPR255/SGPR95 state boundaries are reference-evaluator checks. There is no GPU hardware/emulator execution or whole-kernel claim. Wave32 profiles, EXEC updates, VCC/divergence, carry/stack in mixed wave bodies, memory/barriers/traps and wave Cranelift JIT/AOT remain unsupported.

Next migration work: GPU lane-register layout and kernel ABI, cspec allocation rules and direct SLA decisions/context/templates.

Register layout / ABI update at cf2a023

  • Own .fslregs text grammar records default memory, byte-addressed spaces, address widths/order and named register byte views. Imported BPF LE has 15 views / 15 overlapping pairs; eBPF LE/BE have 12 views each. Register identities belong to a particular layout.
  • RegisterFile shares bytes across aliases and preserves bytes outside partial writes. Unknown units/names, width/range failures and oversized reference storage refuse. It does not infer architectural zero extension or read-only register semantics.
  • link_abi resolves ordered input/output, preserved/clobbered and stack identities with range/width/alias checks. eBPF links R1..R5, R0 and R6..R10; R10 occupies bytes 80..87. Unchanged BPF source refuses the strict first stack gate: RS=4 bytes versus pointer_size=8. This is a supported-contract boundary, not a general ABI rule.
  • execute_bound connects explicit disjoint register/flag slots to existing canonical FIR reference execution and commits backing bytes only on success. Operand selectors may alias a slot; inter-slot view aliases refuse. No new FIR dialect or package version was added.
  • Seven new tests; 29 total crate tests passed with no skips in the final run. 968 synthetic byte-storage states match an independent byte oracle (484 per storage order), both using the existing LE instruction profile. No BE instruction decode or new storage C/Rust projection is claimed. Existing stack/scalar/carry/wave/eBPF C/Rust recompilation tests were rerun separately. Formatting and Clippy with warnings denied passed.
  • Research reproduction regenerates four new artifacts exactly and exercises eight native CLI gates: three layout parses, two eBPF links, expected BPF refusal and two linked leaf executions. Existing nine historical artifacts and four first migration artifacts stay unchanged. SOP2 256 / wave 128 encoding locks and two compiled kernel instruction rows still pass locally.
  • GPU register/lane layout and kernel ABI, calls/allocation, binary ABI/layout packaging and general SLA semantic lowering remain unsupported.

Direct SLA migration at 217d7ea

  • Independent offline packed-v4 importer emits 12 register views and one bound ADD64 register branch into owned FSL. It does not read Sleigh source grammar or call a legacy decoder. The runtime/compiler/recompiler consumes ordinary FSL, without an SLA dependency.
  • Instruction/ancestor bit constraints, selector bindings/holes, constructor/operand IDs, pure export and BUILD/INT_ADD atoms are resolved from binary data. Leaf-pair priority is retained: earlier competitors refuse; later overlaps are recorded. Opcode 60 is BUILD in this template context, not executable phi. Meaning is not selected by known bytes/mnemonics/constructor IDs/source lines.
  • 129 constructors / 98 root constructors are inventoried with source IDs/opcodes/refusals. One root register variant and its pure export dependency are consumed. Immediate exports, context, sections, dynamic handles, unknown/extra effects, memory/control flow and general SLA migration remain unsupported.
  • SLA-derived layout/encoding/canonical FIR matches the source-derived candidate. All 65,536 opcode/selector prefixes agree; both admit 121. SLA candidate: 484 synthetic states / 1,936 C/Rust O0/O2 comparisons; another 484 bound-byte-storage states. Live legacy SLA oracle: 121 byte/length/binding/IntAdd comparisons. Shared lineage, not independent architecture/verifier/hardware proof.
  • 32 native tests passed with no skips; existing recompilation gates rerun. Python 14 tests; eight mutated semantic/selector/priority cases refuse. Formatting and Clippy with warnings denied pass.
  • Three research artifacts reproduce exactly; portable v3 package SHA is locked. Four native CLI gates parse/link/execute the package. Research CI uses a compiled-SLA-only sparse checkout and asserts the source language directory is absent.
  • GPU layout/kernel ABI, whole function/VM execution and hardware semantics are not established by this slice.

Independent FIR and GPU projection update at 3eb6866

  • FIR owns its types, operations, state/effect and validation contracts. P-code is an optional migration/compatibility boundary, not a required execution or analysis substrate. GPU outputs consume the existing CompiledInstruction/FirOp directly.
  • emit/emit-bytes add cuda and ptx targets. This first slice admits stack pop/push and wrapping addition at 1..64 bits; register/flag/lane effects, wide values, unsupported bodies and malformed SSA refuse before output. No second semantic IR or package version was introduced.
  • CUDA C++ and PTX export a defined reference-kernel ABI: u64 stack slots/depth/capacity and u32 status in valid aligned disjoint global buffers. One block/thread at coordinates all zero owns one state. Non-owners/null status make no global accesses; failed preflight preserves stack/depth. Host completion and non-overlapping launches are caller preconditions.
  • 41 profiles (five widths, two signs, four ordered bodies plus JVM iadd) pass 3,444 generated-PTX scalar-reference states and 82 Clang NVPTX device compilations at O0/O2. The scalar interpreter uses artificial flat global addresses; it is not a GPU emulator or memory-consistency oracle. Eight source/target combinations refuse at semantic gates.
  • All 35 native tests and 18 research Python tests pass locally; existing C/Rust recompilation gates were rerun. Formatting and warning-denied Clippy pass.
  • Research CI adds hash-locked NVIDIA ptxas 12.8.93 (wheel/executable/license) assembly of direct and Clang-produced PTX. Assembly evidence is reported separately from scalar reference and device compilation. Local macOS did not execute the Linux ptxas binary.
  • GPU hardware execution, recovered CUDA kernel ABI/guest decode, SIMT divergence, synchronization/atomic/memory semantics and an owned SASS backend remain unsupported. This is a reference evaluator projected to GPU targets, not a claim of whole-kernel recompilation or decompiler quality.

Linux research CI 37117442053 passed at research commit 3fd4346: 3,444 scalar-reference checks, 82 CUDA device compilations and 123 ptxas cubin assemblies. The three retained JVM sample cubins match reported hashes and ELF64/EM_CUDA; direct output has sm_70 flags and .text.fsl_execute. Hardware execution remains not run.

Owned library corpus update at a678076

  • New owned FSLD v1 .fsldb reader and native library-inspect / exact library-query commands in fission-fsl, with no FPK/SLA/SLEIGH dependency. .fslib TOML compilation and bounded offline FPK import live in the research repository. Only a self-authored three-row fixture is checked into this crate.
  • A pinned C-library FPK yields 31,418 prototype candidates and 15,455 parameters. Preserve unresolved type spellings, declared-empty/listed parameters and unknown/explicit variadic evidence; macro names and missing variadic markers are not promoted to verified functions or ABI contracts. Full native parse and three exact queries pass locally; source/package hashes are locked by research reproduction.
  • Local native gate: 37 tests passed with no skips, including existing C/Rust recompilation regressions; formatting and warning-denied Clippy passed. Research Python: 21 tests passed.
  • Strict schema/bounds/UTF-8/order/EOF checks refuse invalid catalogs. Whole-package integrity is verified by the research lock; provenance hash fields do not authenticate a package.
  • The successor direction preserves block parameters, terminators, domain regions and ordered effects in one FIR. These structural components are a documented design, not implemented control-flow execution: current FirOp still represents a single-instruction operation sequence.
  • Product signature-loader replacement, whole legacy-corpus migration, ABI allocation, structured FIR execution and decompiler quality are not established by this slice. Research CI adds inventory, artifact reproduction and native reader gates; CI results must be checked separately.

Structured FIR control update at 2107f62

  • One canonical value/op table now retains FirBlock op ownership ranges, typed block parameters and explicit return/branch/conditional-branch terminators. .fslc v6 stores the graph. Versions 1–5 retain byte layouts and expose an implicit entry/return view. No second semantic IR or mandatory P-code lowering.
  • int.const, equality, unsigned-less and signed-less comparisons share source/package validation and reference/C/Rust execution. Conditions/results are u1; cross-block values require typed edge arguments. Unreachable blocks, bad ownership/scopes/IDs/arity/types and unknown binary tags refuse.
  • First executable scope is acyclic integer/stack semantic-body CFG, with equal stack deltas at joins and all returns. All syntactic paths participate in conservative stack preflight; failed preflight preserves state. Cycles and unequal-delta joins remain representable/diagnosable but execution refuses.
  • 16 synthetic profiles: 2,048 independent-oracle/reference states and 8,192 warning-denied C/Rust O0/O2 comparisons. Separate 65,536 bounded-input oracle and native CLI branch cases pass. Failure output checks all four backing slots; success checks active stack state.
  • Full nextest serial gate: 43 passed, zero skips/leaky classifications. A parallel run reported one leaky classification, so serial gate was rerun. Formatting and denied-warning Clippy pass; Python 22 tests and existing migration/layout/SLA/library/historical artifacts reproduce.
  • GPU/register/wave/native lift-record/JIT/AOT backends explicitly reject control bodies, avoiding accidental linear execution of the op table. Real binary function lifting, loop execution, memory/traps/calls, nested domain regions and structured GPU execution remain unsupported. This is synthetic semantic contract evidence, not decompiler quality or whole-function equivalence.
  • Research CI pins this commit and adds source-copy, package/output hash and 12 native CLI oracle + 2 failure checks. CI conclusion is separate from the local gates.

2026-10-04 — integer conversion and register-state CFG (7f7b22a)

  • Add canonical IntConvert / int.zext, int.sext, int.trunc with strict matching signedness and 1..64 bit width rules; v7 op tag, unchanged v1–v6 byte layouts.
  • Reference and C/Rust traverse the same acyclic scalar register/flag block graph. Preserve selected-path ordered effects, captured SSA values, simultaneous edge arguments, and read-after-write at joins. One mutable logical-slot state context; first-class effect SSA remains future work.
  • Preflight every syntactic path before mutation, including untaken selectors/flags; cyclic execution refuses. Narrow writes replace a whole logical slot. The byte-layout adapter still requires exact widths and disjoint bindings.
  • Local gate: nextest serial 48 passed / 0 skipped / 0 leaky, Python 24 passed, formatting and warning-denied Clippy passed. Previous v6 package/output hashes and historical/migration/layout/SLA/library artifacts reproduce unchanged.
  • New C/Rust O0/O2 comparisons: 12,288 conversion + 27,680 register CFG + 8,240 constructed 32/64-bit carry CFG = 48,208. Independent widened arithmetic oracles, exhaustive 256 × 27 register alias placements, storage preservation on failure. These are authored semantic-body graphs, not recovered GPU CFGs.
  • Research main 4da18ae locks the 803-byte package and three outputs, with 44 native CLI oracle cases and three failure cases; CI pins the native compiler commit.

Limits: self-authored specification validation, no hardware or whole-function equivalence evidence. Loop execution, GPU CFG/divergence, memory/calls/exceptions, real binary function lifting, structured native JIT/AOT and CUDA/PTX execution remain unsupported. Next scope is multi-instruction register-state composition and explicit origin/state contracts. Keep this experimental PR open for later merge decisions.

2026-10-04 — sequential FIR state and byte origins (16f84f4)

  • FirSequence references existing canonical instruction bodies with fresh body-local value frames. Sequential instances share ordered logical register/flag state; there is no second semantic IR or flattened op copy.
  • .fslseq v1 embeds the unchanged .fslc and explicit input window. Preserve per-instance addresses, offsets, byte lengths/raw bytes/fields, package/window SHA-256 and referenced spec evidence. Loading re-derives instances after validating framing, lengths, EOF and hashes. Base and exact bank ABI are caller supplied; hashes do not establish authenticity or loader address mapping.
  • Validate all selected bodies/selectors before effects; reference/C/Rust wrappers run on temporary banks and commit only after success. This is a wrapper transaction, not guest fault ordering or a concurrent atomic operation. Limits: 1..4096 fixed-width instructions, 4096 slots per bank, 64 MiB envelope. Zero banks are explicit contracts.
  • CLI: compose/inspect/execute/emit-sequence. CUDA/PTX output refuses; sequence native Cranelift JIT/AOT is unsupported.
  • Local native gate: 53 tests passed serially, zero skipped/leaky; Python 27 tests, formatting and warning-denied Clippy passed. Envelope truncation/hash/byte corruption, late unsupported words, bank/selector bounds, cycles/stack and synthetic endian transport are checked.
  • Independent 1060-state u128 arithmetic oracle for two scalar bodies. New C/Rust O0/O2 source comparisons: 5280 scalar sequence + 1036 three register CFG instances + 8 zero-bank cases = 6324. Widths other than 32 are synthetic primitive checks, not GPU ISA support.
  • Research reproduction locks two envelopes (7687 and 911 bytes), independently checks origin/framing contracts and six outputs, compares 112 native CLI oracle states and four failures. CI is pinned to this compiler revision. Previous structured/conversion/historical/SLA/layout/ABI/library artifacts reproduce unchanged.

Scope remains self-authored sequential instruction windows. Loop execution, GPU CFG/divergence, memory/calls/exceptions, inter-instruction branch/PC recovery, mixed/variable-width profiles and actual binary function lifting remain unsupported. Next boundary: inter-instruction branch/PC contracts and loader-backed origins. Keep this experimental PR open for later merge decisions.

2026-10-11 — owned x86 scalar windows (55905c3)

  • Remove the initial iced-x86 dependency. The x86 feature uses owned prefix/opcode/ModRM/SIB/immediate readers and text .fslx encoding data. No external instruction decoder library is introduced. Existing workspace loader, SHA-256 and Cranelift dependencies remain.
  • 46 encoding rules select 63 canonical FIR bodies for selected 16/32/64 scalar register/immediate, LEA and direct-control forms. Binary .fslxc holds compiled rules and the sole .fslc body pool. Original bytes/addresses stay in instances; normalized operand tokens are not guest encodings.
  • Preserve the prior generic Sub/And/Or/Xor work and add a generic bounded little-endian memory read. Near RET reads the supplied stack window, updates SP and exit PC in FIR. Explicit-state C/Rust functions use the existing semantic backend, not mnemonic-specific arithmetic implementations.
  • Canonical loader reads caller-selected executable file-backed spans and rejects overlapping relocations. Three raw mode windows and two fixed Clang-produced ELF spans generate 15 FIR/C/Rust artifacts; five supplied states execute in the FIR reference evaluator. All ten emitted C/Rust sources compile with warnings denied. Native default/x86 builds, formatting and denied-warning Clippy pass locally. Existing unit suites were not rerun locally for this slice; remote CI is tracked separately.
  • Research inventory records 78 x86 assets and migrates 1,380 legacy / 1,440 long-mode register views. Scalar semantics are authored from referenced sources; general SLEIGH constructor translation and cspec/pspec/context migration remain incomplete. Research CI pins this native commit and reproduces package/source/output hashes and five self-derived execution records.

Limits: no independent ISA execution oracle, emitted-source runtime parity or full x86 decompiler claim. Ordinary memory operands/store, calls/callee ABI, indirect control, byte/high-byte registers, x87/SIMD/AVX and faults/segments remain unsupported. 16-bit memory assumes flat SS.base=0; wrapper rollback is not CPU fault ordering. The i386 ELF uses explicit regparm(2), not default cdecl. Keep this PR open for research and later merge decisions.

2026-10-11 — readonly x86 memory and input evidence (dc665c7)

  • Reuse the owned generic ModRM/SIB/displacement address reader for readonly RegRm memory sources. Optional canonical FSL body pool grows 63 to 126 (MOV/ADD/SUB/CMP/AND/OR/XOR); encoding rules stay at 46. No external decoder, new dependency or Cargo.lock change.
  • RecoveryState derives entry-register/read dependencies and modular affine addresses from canonical FIR. Input candidates retain raw bytes, address, operation index and width. Unknown branches/transfers refuse. Convention is unselected; source types/prototype/argument count are unknown. No second arithmetic executor or semantic IR.
  • Three fixed compiled ELF spans: default i386 cdecl ADD and SysV AMD64 pointer ADD/XOR. Recover entry ESP+4/+8 and RDI+0/+8 reads as candidates, separate RET control reads. Explicit-state C/Rust output is retained.
  • Full x86-feature serial nextest: 61 passed, no skips. Independent arithmetic/state calculations: 768 FIR states; generated C/Rust O0/O2 runtime comparisons: 3,072 passed. Previous structured/register/sequence goldens and original x86 artifacts reproduce unchanged; research Python suite 27 passed.
  • ARM64 macOS original pointer64 ADD/XOR bytes executed through Rosetta: 512 result/defined-flag observations agree. Original i386 adapter was not executed locally. Research Linux CI 38100633006, at research head 8187cc2 / compiler dc665c7c9, completed successfully: all three original-byte adapters supply 768 result/defined-flag comparisons, 768 FIR states and 3,072 C/Rust executions; the same legacy AF differences reproduce. The immutable Linux artifact is archived at research main d80d892.
  • Actual compiled SLA frontend and canonical P-code evaluator baseline: ADD AF differs in 96/256 cases per ADD fixture, other flags/GPR/exit agree. XOR undefined AF is excluded in 256 cases, defined flags agree. The checked-in resultflags omits AF; this is specification coverage, not proof of a P-code expressive limit. Controlled FIR metadata ablation and general decompiler accuracy comparisons remain future work.
  • FSL strict Clippy/format pass. Baseline build and CI-equivalent Clippy pass (-D warnings -A clippy::style -A clippy::complexity); unqualified strict baseline Clippy encounters existing solver/emulator style/complexity debt without library changes.

Research main commits a612474 and 8187cc2 lock sources, three ELFs, package, 12 projections/input reports and local measurements; CI pins this native compiler commit. Experiment and limits and accuracy evaluation design.

Limits remain readonly flat memory/zero segment bases and supplied executable spans. Stores, stack frames, calls/callee ABI, recovered CFG joins, source signatures, fault/order semantics and full x86 asset migration are unfinished. Machine oracle compares result and defined arithmetic flags, not all architectural state or whole-function equivalence. Keep the PR open; no merge requested.

Verification status after the memory experiment: the remote experimental branch is dc665c7c9. GitHub PR head still reports 55905c397; the new branch head was verified separately through workflow-dispatch CI 38100671908. All jobs at that native head completed successfully. Research data-only head d80d892 also passed CI 38101042360. No merge was attempted.

2026-10-11 — ordered stores and compiled stack frames (8211a05)

  • Canonical MemoryStoreLittle / memory.store.le, typed unsigned bytes and explicit readonly/mutable bounded window permissions. Package v11 tag 22; previous versions and original/read-only artifact bytes reproduce. No external decoder, new dependency or Cargo.lock change.
  • Optional 48-rule / 141-body pool adds nine MOV stores and six PUSH/POP bodies. Generic ModRM/SIB/address binding is reused; stack arithmetic and ordered effects remain FSL. Modern IA-32 16-bit ordering excludes 8086 PUSH SP; stack-address-width=mode and SS.base=0. Intel SDM source/hash is carried separately in stack evidence.
  • Mutable FIR/window execution and emitted C/Rust use bounded success-only commit (maximum 1 MiB); C/Rust requires exact-size disjoint caller scratch. Failure preserves caller registers/flags/memory/exit, scratch unspecified. This is a wrapper transaction, not CPU fault ordering or atomicity.
  • Derived memory input evidence retains exact same-address/width forwarding, proven disjoint ranges and uncertain partial/unknown aliases with store origins. No source prototype, argument-count or ABI convention assertion; pointers may alias saved stack values.
  • Three fixed actual ELF spans: O0 cdecl32 EBP frame, O0 AMD64 pointer spill/reload and O2 AMD64 external store. Independent modeled state/memory oracle: 768 FIR states. C/Rust O0/O2: 3,072 success plus 3,072 budget failures after actual writes, all agree. Original Rosetta64 bytes: 512 result/six defined flags/RBP preservation/SP balance/external-memory observations agree. i386 original bytes were cross-compiled but not executed locally; Linux CI requires them.
  • Full x86-feature serial nextest: 66 passed / 0 skipped; strict FSL Clippy/format passed. Python 27, prior structured/register/sequence reproduction, original x86 projections and readonly 768-state/3,072 compiled execution gates pass again. Native tests also cover late store/load and RET failures, permission/type/version guards, modern 16/32/64-bit stack alias contracts and uncertain aliases.
  • Actual SLA/canonical evaluator agrees on all modeled GPR/exit/160 memory bytes. AF alone differs in 96/256 cases per fixture. This is the known legacy specification omission, not a P-code expressive limit or evidence that FIR philosophy is superior.

Research main 69b6f89 locks 3 sources/ELFs, specs, package, 12 outputs and clean-checkout local validation; c718c31 pins this compiler and adds Linux machine-oracle CI. Contracts and evidence. Native CI 38130023456 passed at the new exact branch head. Research CI 38130097795 passed at c718c31: Linux original32/64 machine adapters each compare 256 cases, 768 total, with the same defined flags/frame balance/external-memory observations. Research 623a806 then hardened the 64-bit oracle RBP constraint and call-site alignment, recorded adapter/source-lock/shared-model hashes, and reran local 512-machine/768-FIR/6,144-compiled comparisons. Hardened-adapter CI 38130695902 also passed: 768 original32/64 cases, 768 FIR states and 6,144 compiled comparisons. Source-lock/shared-model/adapter executable hashes were verified. Research main 4aae273 archives both immutable Linux reports and current handoff documentation; its data/doc-only rerun is tracked separately. The earlier Linux report is kept as a separate snapshot. The PR head now matches 8211a0561; it was checked directly along with the workflow head. Keep PR open; no merge requested.

Limits: authored bounded spans, flat memory/zero segment bases, no descriptor/fault/concurrency model, separate displacement/literal binding still needed for memory immediates, no CALL/LEAVE, full ABI allocator, recovered CFG joins/loops, full x86 migration or whole-function equivalence. Hardware snapshots do not cover all GPRs or complete stack memory.

2026-10-11: independent displacement/literal bindings

  • Native 867dae1fa0f278e87f6dc3e8244ca4fd307cced5 adds owned-x86-v2 / FSLXPKG2; v1 bytes and normalized operand interpretation stay reproducible. Canonical FIR remains v11.
  • Optional 48-rule /150-body pool adds nine authored MOV C7 memory bodies. Generic decoder/binder supplies separate 64-bit address addend and32-bit literal; FIR owns truncation/sign extension/store effects. No new semantic primitive or decoder dependency.
  • Local full x86 nextest71 passed/0 skipped, strict FSL Clippy on/off and fmt passed; Python29. Existing package/projection locks, four source-generation pools, structured/register/sequence gates and stateful execution reproduce.
  • Three actual Clang O2 AMD64 ELF spans:768 modeled FIR states,6144 C/Rust O0/O2 success/rollback rows,768 Rosetta64 original-byte comparisons. Original observations are result/six defined flags/external two words/preserved RBP/SP balance. Not full hardware state or whole-function equivalence.
  • Actual SLA evaluator agrees on modeled GPR/exit/memory;AF differs96/256 per fixture because the reference spec omitsAF. No FIR-vs-P-code accuracy superiority claim.
  • Other memory ALU destinations,CALL/callee ABI,recovered guest CFG/type/full x86 migration remain unsupported/incomplete.
  • New native CI: https://github.com/fission-systems/Fission/actions/runs/38135853441 (completion tracked separately). Research workflow pins this native commit and adds Linux original-byte checks for the new spans.

PR remains open for a later merge decision; product main is unchanged.

2026-10-11 — source backend contracts (cc02f3b)

  • Add object-safe OutputBackend descriptor/plan/emit and an in-process registry. Builtin C11 and Rust 2021 providers borrow canonical FIR; no second semantic IR, decoder dependency, new package format or source-output changes.
  • Admission checks dialect/runtime/memory/context, canonical validity and existing stack/register/wave/window contracts. Plans enumerate effect requirements; unsupported input returns structured reasons. New semantic domains require explicit contracts.
  • Bundles include source, compiler recipe and symbol-level origin associations; x86 retains address/raw bytes/input offset/length. Generated reports explicitly mark compilation/equivalence as unperformed. Statement maps and dynamic plugins are not implemented.
  • Add plan-binary and bundle-binary; existing output directories refuse. Six real ELF C/Rust bundles reproduce locked source bytes plus 18 metadata goldens and compile. Six existing-directory refusals and one unknown Go refusal pass.
  • Native full x86 nextest:77 passed/0 skipped; six backend tests rerun after origin assertions. Strict Clippy with/without x86 and fmt pass. Research Python31 pass. Existing immediate-store regression rerun from clean native head:768 FIR states,6144 C/Rust success/rollback rows,768 Rosetta original-byte observations pass. These bounded observations are not whole-function equivalence or FIR accuracy superiority.
  • Research main cd64109 pins this compiler, archives clean local reports and adds the bundle gate to Linux CI. Existing immediate original-byte execution gate remains separate.
  • Maturity comparison identifies complete ISA coverage and general CALL/ABI/CFG/type recovery as the largest gap to the existing product path. Go/Python/Java and JVM/CPython/WASM method frontends remain unimplemented; current CUDA/PTX experiments remain outside the registry.

Previous native CI38135853441 and research CI38135982284 completed successfully. New native CI38138760978 is tracked separately at exact head cc02f3be760e43153ccb212d3640d45905e3b8c6. Keep the PR open for research; no merge.

2026-10-11 — Go backend (97366a8)

  • Registered GoBackend (go1.25) consumes borrowed canonical FIR through the same descriptor/plan/emit contract. No second semantic IR, new package version, external decoder or generated Go dependency.
  • Project fixed-width stack arithmetic, acyclic scalar CFG/conversions/carry, ordered register/flag effects, masked wave64 VGPR/SGPR broadcast and bound x86 windows. Go uses uint64 masks and simultaneous block parameter assignment; snapshots preserve caller state/memory/exit on window failure. Overlapping output banks and exit pointers refuse without unsafe code.
  • fslc emit-backend PACKAGE INSTRUCTION go OUTPUT.go; x86 plan-binary and bundle-binary now accept go. The legacy OutputLayer/sequence interface is unchanged. Generated Go functions are currently package-local state helpers, not recovered source signatures.
  • Native x86 nextest80 passed/0 skipped; strict Clippy with/without x86 and fmt pass. Python35. Six locked actual ELF spans:6144 Go default/optimization-disabled and12288 C/Rust O0/O2 state/memory/rollback comparisons passed; unchanged C/Rust source goldens. Synthetic domains:18426 Go comparisons. Twelve Linux amd64/386 host archive builds are compile-only evidence.
  • Research main 522cf90 pins this compiler, locks16 generated source files and immutable parent inputs, archives clean native provenance and adds pinned Go1.25.5 CI execution. Current unregistered-language refusal uses Python; the earlier observed Go refusal stays in its historical report.
  • This new gate does not run original machine bytes. Existing original-byte/FIR/SLA CI gates remain separate. Guest faults/concurrency, host heap exhaustion, source prototype/full ABI/CFG/x86 recovery, Go FirSequence, complete JVM/CPython/WASM methods and GPU hardware execution remain unsupported/outside scope. No performance or FIR superiority claim.

Previous source-contract native/research CI38138760978/38138856532 passed. Current exact-head native CI38141160429 is tracked separately. Keep this experimental PR open; no merge.

2026-10-16 — asset-independent ELF/FSL/FIR entry point (bbf6a19)

Goal: ultimately run the complete decompiler pipeline on owned FSL/FIR without SLEIGH/SLA. This slice establishes an independent selected-span path; general function recovery remains incomplete.

  • Found the previous owned decoder path still used Ghidra opinion/ldefs indirectly through ELF loader architecture selection. Add opt-in LoaderPipeline::load_format_facts / LoadedBinary::from_file_format_facts: reuse canonical ELF parsing/mapping/relocation/symbol code, validate i386/x86-64 machine/class/endian facts, leave ABI unselected and produce no legacy BinaryLoadSpec. No fake Ghidra language ID. Existing default metadata selection remains available outside the new route.
  • fsl-x86 decompile-owned INPUT.elf ADDRESS SIZE c|rust|go NEW_DIRECTORY compiles embedded owned x86 v2 FSL, binds canonical FIR and emits checked source plus portable profile, diagnostic FIR, origins and build/route reports. No package preparation, SLEIGH/SLA/P-code path or fallback. Unsupported format/bytes/backend refuses before output creation.
  • Local full suites:82 FSL x86 and165 loader tests pass, zero skipped. Focused pipeline/format-facts tests pass after constant/error propagation cleanup. Strict FSL Clippy on/off, fmt and downstream decompiler/CLI checks pass. Python38.
  • Three actual ELF spans produce nine package/FIR/source bundles byte-identical to previously locked outputs; nine source compilations and11 refusal checks pass with copied executable/inputs and empty cwd/resource roots/HOME/PATH. Local mode still permits other host file access and is not filesystem isolation evidence. No new execution-equivalence or instruction-coverage claim.
  • Research main 5a3c0e4 pins this compiler and adds a dedicated crates-only build without utils/vendor or legacy asset extensions, followed by Linux chroot/strace execution with only the executable, dynamic libraries and ELF inputs. Even failed legacy file opens/stat refuse. This is a resource-closure experiment, not a security sandbox. Current research CI: https://github.com/fission-systems/fission-research/actions/runs/38833583316 (completion tracked separately).

Remaining: source function discovery, CALL/callee ABI and general CFG/type recovery, full x86/other formats/ISAs, guest fault/concurrency semantics, whole Python/JVM/WASM methods and complete product-route migration. Existing product SLEIGH/NIR/HIR and offline legacy comparison/import gates remain separate. Keep PR open; no merge.

2026-10-16 — owned entry selection / DecBench baseline (0fc6f6f)

  • Add decompile-owned-entry INPUT.elf ADDRESS c|rust|go NEW_DIRECTORY, using the same owned package, metadata-only ELF mapper, canonical FIR and checked backend. Own decoder scans only a straight-line executable/file-backed prefix to near RET, bounded by 65,536 bytes / 4,096 instructions. Branches, unsupported bytes, exhausted bounds and relocated windows refuse. No function size oracle, legacy assets, external decoder or fallback.
  • The entry window is not a proven whole-function boundary or original source ABI. Existing span package/FIR/C/Rust/Go bytes remain unchanged. Three locked owned ELF fixtures admit matching entry-state bundles; the research isolation gate now traces this entry route too.
  • Research main f7c63c1 adds an out-of-tree static-only DecBench external sample-set adapter, immutable reports and tool/input hashes, per-function checkpointing, timeout and integrity checks. Only functions.json.public selects entries; no target execution/emulation or private/source/DWARF/reference-decompiler answer key is used.
  • Actual 250 functions / 224 binaries: 92 loader/architecture refusals, 148 owned-decode refusals, 10 entry-CFG refusals, zero complete state bundles and zero eligible ordinary C functions. No DecBench metric, submission archive or score. Even successful explicit-state wrappers remain ineligible until original ABI/return contracts are recovered.
  • Local full FSL x86 suite: 84 passed / zero skipped (final nextest run reports one process-leak warning); strict FSL Clippy and formatting pass. Python 47 including real fixture integration passes. Nine source compilations, three entry-only source/FIR comparisons, 11 refusal checks and dependency closure pass from a clean native pin.
  • Research CI https://github.com/fission-systems/fission-research/actions/runs/38855472809 and native CI https://github.com/fission-systems/Fission/actions/runs/38855161475 are in progress; do not treat them as completed gates yet. Previous research runs 38833583316 and 38842367012 passed. Previous native PR-merge run 38833458410 failed compiling legacy Sleigh context tests (u128/u64 API mismatch); the PR event run 38833454267 passed. Full product CI is not claimed green.

Next substantive gates: generic missing instruction/effect coverage, reachable function CFG/calls and FSL-owned ABI/return contracts, then ordinary C submission eligibility. Alive2 is deferred; LLVM refinement checking requires a trusted lifting boundary and matching ABI/memory/UB contracts. Keep this PR open; no merge or product-main commit.

DecBench gate follow-up

Research main 667c56d retains the initial baseline and a second immutable 250-function report after hardening panic/signal classification. Both runs have identical refusal counts and zero tool crashes; ordinary C eligibility remains zero. Python48 tests pass locally. No submission or metric run has been made.

The owned-fsl-pipeline job in research CI38855472809 passed at native0fc6f6f98: source-only build, adapter/owned-fixture integration, nine compiled span bundles, three byte-identical entry-only C/FIR bundles,11 refusals and23 file traces with zero attempted legacy asset accesses. Immutable trace report is archived in experiments/decbench/sample-set. Other research jobs and follow-up runner CI remain separately tracked. Native PR-merge CI38855161475 failed with the same legacy Sleigh test u128/u64 API mismatch; no full product CI success is claimed.

2026-10-17 — quantum logical effects in the same FIR (1f5e4c5)

PR renamed to Project Fission: A Unified Semantic Engine. The quantum experiment is an ideal logical-circuit reference on a classical host; no QPU binary/hardware or speedup claim.

  • Add canonical FirOp::Quantum (H/X/Z/CX, Z measurement, reset, classical-u1-controlled X), FSL syntax, SSA/type checks and FSLCv12/tag23. No second semantic IR or new dependency. Earlier sources retain their package versions/bytes. Qubit indices identify subsystems of one joint state; reference resource admission is separate from representation.
  • Classical-host reference enumerates weighted measurement branches and joint post-states; resetting an entangled subsystem yields a mixture without exposing reset's internal outcomes as measurements. Bounds:1..8 state qubits,256 linear ops,64 classical slots,12 measurement/reset effects. This is numerical f64 with explicit caller initial state, not exact symbolic semantics, noisy hardware or a general hybrid CFG executor.
  • Restricted OpenQASM3.0 frontend translates to ordinary FSL/canonical FIR, and export consumes that FIR. Supported indexed q/m subset only; unknown semantics refuse. Declared qubit count/initial state remain caller context, not a complete serialized QASM envelope. C/Rust/Go/CUDA/PTX/native JIT/AOT reject quantum contexts. QIR is not implemented.
  • Local full x86 suite:93 passed/0 skipped; Python54; strict Clippy with/without x86 and fmt pass. Existing nine x86 source compilations, three entry-only output comparisons and11 refusals still reproduce locked bytes at the clean native pin; no new original-x86 execution/DecBench score claim.
  • Seven authored circuits,154 basis/complex-product/entangled initial states,308 native-and-QASM-roundtrip conditional-state comparisons against separately implemented Python dense-density/Kraus calculations. Check classical records, probabilities, conditional states, coherence and total density within2e-10; observed maximum difference about7.8e-16. Own QASM roundtrip is not an independent full parser oracle, and finite inputs do not prove equivalence for arbitrary programs.
  • Research main 99e9edc implements the checker/pins/goldens; d9b2f3c archives Linux evidence. The quantum-reference job in https://github.com/fission-systems/fission-research/actions/runs/39015425831 passed: source-only build without legacy assets, nine native quantum tests, six oracle/artifact tests and all308 comparisons. Linux report/package/source hashes are retained under experiments/quantum/ideal-circuits. Other research jobs remain separately tracked.

Full native PR-merge CI39015128385 still fails compiling existing Sleigh context tests (u128 arguments to u64 APIs), as before; quantum-specific CI success is not full product integration readiness. Keep this experimental PR open; no merge or product-main commit.

Quantum channels / canonical block execution (2026-10-17)

  • 1fe65569e: explicit bit flip, phase flip and amplitude damping channels in the same FIR. Rational u8 probability parameters; FSLC v13. Ideal packages retain v12 and previous hashes. No new runtime dependency or second IR.
  • Acyclic canonical blocks, u1 conditions and parallel block arguments execute on weighted joint states. Noise environment alternatives remain unobservable; all cycles refuse before execution. OpenQASM and classical/native source projections refuse unsupported CFG/noise input.
  • Independent dense-density/Kraus calculation: 33 authored cases / 678 input comparisons passed; maximum error 4.440892098500626e-16 with tolerance 2e-10. Old ideal corpus: 154 inputs / 308 native + own-QASM-roundtrip comparisons still pass unchanged package/QASM locks. This is numerical authored-fixture evidence, not hardware, parser independence or a formal equivalence claim.
  • Local full fission-fsl with x86: 99 passed, 0 skipped; quantum integration: 15 passed; strict Clippy/fmt passed. Research Python: 59 passed. No new DecBench score or real-x86 corpus measurement.
  • d3737ba8f merges current main into this experimental branch and updates two main-introduced SLEIGH probe tests to existing wide context APIs. Targeted 2 passed; SLEIGH library 359 passed, 3 skipped. Product main untouched. Prior compile-error run is historical; current PR CI 39019512207 is running.
  • QPU input remains research: pinned eQASM assembler source reveals opcode/layout configuration differences from the CC-Light paper. No real device binary, calibrated hardware noise, timing/pulse model or cyclic quantum execution support.

Research artifacts: experiments/quantum/channels-cfg/; QPU admission notes: docs/qpu-binary-boundary.md in fission-research. Keep this PR open for review.

Verified Linux quantum channel evidence

Research run 39019757014 / quantum-channels-cfg passed at clean native 1fe65569e: 678 noise/CFG comparisons and 308 old ideal regression comparisons. Package/oracle hashes match local evidence; maximum absolute error remains 4.440892098500626e-16. Raw Linux reports are archived in fission-research. Local research suite now 60 passed after adding archive integrity coverage. Native PR Linux tests are still running; full PR CI success is not yet claimed.

Bounded quantum execution and binary-format inputs (2026-10-17)

Native 4a3c48297d5a3649774b70f5fff40e1857eb9beb:

  • Cyclic canonical blocks execute under explicit step/split/retained-branch budgets in the existing u1 subset. Partial runs preserve completed and pending states/probability with canonical cursors; no terminal result or renormalization. CLI resource stops exit nonzero. No second IR or new runtime dependency.
  • FSLC v14 adds integer-picosecond duration/T1/T2 relaxation (T1,T2>0, T2<=2*T1): declared zero-temperature Markovian idle evolution. Old ideal/channel package hashes remain unchanged. Historical IBM Manila snapshot dated 2024-05-27 is archived with source/license hashes; explicit <=0.5ps conversion residuals and physical-row to logical-model-slot mapping. This is not live calibration, readout/gate/crosstalk fitting or noise correction/mitigation.
  • Separate pinned eQASM assembler build emits 200 words: own FSL format decode + re-encoding and upstream word disassembly pass. Three data rules, no architecture-specific decoder primitive. Timing bodies and opaque bundles retain unsupported execution semantics. The assembler warns its device layout is unset; no real QPU capture, pulse/gate identity or target execution claim.
  • Local native: quantum 21 passed, full crate with x86 105 passed, 0 skipped; Clippy (default/x86) + fmt passed. Independent checks: 420 idle-model input comparisons, 6 terminating loop inputs, and partial retry 15/16 completed + 1/16 pending passed. Maximum model error 2.7755575615628914e-16; observed time-quantization density difference 8.820099595130415e-09. Old quantum regressions 308 / 678 passed. Research Python 66 passed. No new DecBench score or CPU corpus claim.

Previous-head full PR CI 39019512207 passed, verifying the earlier SLEIGH wide-context fix. Latest-head 39021009277 passed. New research quantum-bounded-and-inputs job pins 4a3c482 and builds the reference oracle separately from the owned engine.

Research artifacts: experiments/quantum/eqasm-words/ and experiments/quantum/bounded-calibration/. Physical QPU execution, general classical/quantum CFG, full OpenQASM, timing/pulses and hardware noise correction remain unsupported. Product main remains untouched; keep this PR open.

Final verification for 4a3c482

Full Fission PR CI 39021009277 passed. Research 39021701663 / quantum-bounded-and-inputs passed: quantum integration 21, idle-model 420, terminating loop inputs 6 + partial retry check, eQASM words 200, old quantum regressions 308/678. The reference GCC 13 build required its missing standard <limits> include explicitly supplied; no upstream instruction logic or Fission runtime dependency was changed. Earlier reference build failures remain documented. Raw Linux reports and integrity checks are archived in research main at de921d5; local research suite remains 66 passed. These job results do not imply physical QPU execution or current-device noise calibration/correction.

Integer-controlled quantum CFG (2026-10-17)

Native f15f0293da424b454bceeca7a2d4e4f16c86f5bb:

  • Existing canonical integer constants, wrap-add, sub/and/or/xor, eq/ult/slt and extension/truncation now execute alongside quantum effects (1..64 bits). Shared FIR helpers own arithmetic semantics; no new operation, package tag, IR or runtime dependency. SSA slots hold exact u64 bit patterns, measurements and conditions remain unsigned u1.
  • Bounded cyclic CFG carries counters through parallel block parameters. Budgets retain incomplete probability/state; strict simulation still refuses cycles. OpenQASM explicitly refuses unsupported integer arithmetic before emission.
  • Local native: quantum integration 26 passed; full crate with x86 110 passed / 0 skipped; strict Clippy (default/x86) and fmt passed. Research Python 71 passed.
  • Independent authored corpus: 42 bodies / 882 inputs / 1,344 full instrument comparisons, maximum error 4.440892098500626e-16. Includes zero-trip counters, signed loops, full u64 boundaries, conversion, measurement-selected trip counts and a cycle with two entry blocks. Exact SSA, measurement history, conditional/aggregate density and probability agree. 42 projection refusals and one partial counter CLI check passed.
  • Frozen earlier quantum regressions at this clean native pin: ideal 308, channels 678, historical idle models 420 comparisons plus six terminating loop inputs and partial retry passed. Original package/QASM hashes unchanged.

The user confirms no connected QPU. Physical execution, current-device noise fitting/correction, pulses, memory/calls, general OpenQASM and general quantum-program support remain unsupported. No new CPU corpus or DecBench score. Research artifacts: experiments/quantum/integer-cfg/; separate research CI job pins this compiler. Current-head native CI 39024315647 is running. Main untouched; keep this PR open.

Linux reproduction at f15f029

Research 39024432407 / quantum-integer-cfg passed: 26 native quantum tests, 1,344 new instrument comparisons, 42 projection refusals, partial counter stop; old 308/678/420 comparisons, six loop inputs and partial retry passed. All four raw reports are archived in research main 95ccef0 with matching package/oracle hashes and clean native revision. Local research suite is now 72 passed after archive integrity coverage. This is one successful research job; full Fission PR CI 39024315647 remains in progress at this update. No QPU access/execution or current-device calibration claim.

IBM physical-circuit projection and separate submission adapter (2026-10-17)

Native 4af9bf84b16d288798bde5794de38da8f50a061e adds quantum::ibm::emit / fslc emit-ibm for linear ideal FIR. Explicit physical layout, reset/X basis preparation, RZ/SX/X + directed CX or CZ, X/Y/Z terminal observations and canonical measurement trace IDs. Global phase is unobservable in the admitted instrument; no coherent control of decompositions. u1 constants fold; blocks/arithmetic/noise/ECR/missing couplings refuse. No new FIR op, FSLC version, Cargo dependency, SDK, routing or scheduler.

Separate research stdlib tool prepares/reviews one-job SamplerV2 payloads, verifies Open Plan via instance/catalog lookup, rechecks live target and allowance, submits only on explicit command, retains a pre-POST receipt without automatic retry, and collects bound job results. Joint trace/final counts preserve shot correlation. Statistical TVD/Hoeffding observations do not prove compiler equivalence or correct noise. Request cost <=60 seconds uses the inspected SDK's top-level cost field; enforcement is provider-defined. Paid/unknown/synthetic targets refuse submission.

Local: native IBM tests 4 passed, full fission-fsl with x86 114 passed / 0 skipped; strict Clippy default/x86 + fmt passed. Research Python 85 passed / 0 skipped (13 adapter-specific). Independent dense physical-gate/reset oracle: 684 comparisons across seven authored circuits, basis inputs, every X/Y/Z observation and CX/CZ; max error 6.661338147750939e-16. Modeled Runtime codec: 684 exact joint-count comparisons. Earlier quantum regressions 308/678/420/1,344 and loop/partial checks passed at this clean pin, old packages unchanged.

Artifacts: experiments/quantum/ibm-open-plan/, including a synthetic Bell XX request/reference bundle and protocol source pins. No connected IBM account, authenticated API call, live calibration capture, real result capture or QPU submission occurred. Live provider parser/transport acceptance remains unverified and account setup is pending. No general quantum program, QPU binary, noise correction or DecBench/CPU corpus claim.

Previous native full PR CI 39024315647 passed at f15f029; current-head 39025675113 is running. Separate research job ibm-circuit-projection pins this compiler and uses no cloud credentials. Main untouched; keep this PR open.

Verified Linux offline IBM qualification

Research 39025890375 / ibm-circuit-projection passed at clean native 4af9bf8: 30 quantum/IBM native tests, 13 adapter checks, 684 physical-instrument comparisons, 684 modeled Runtime codec comparisons, frozen 308/678/420/1,344 quantum regressions and loop/partial checks. Five Linux reports are archived under experiments/quantum/ibm-open-plan/ with matching package/oracle/adapter hashes and no credentials or QPU requests. Local research after archive integrity coverage is 86 passed / 0 skipped (14 adapter-specific). User will configure the Open Plan account; actual hardware execution and authenticated provider acceptance remain pending. Dashboard/API-key/CRN and terminal-local zsh instructions are documented. Whole native PR CI 39025675113 is separate from this successful research job.

@sjkim1127 sjkim1127 changed the title Support 128-bit Sleigh contexts and verify JVM iadd lift FSL/FIR Experimental Support Sep 30, 2026
@sjkim1127 sjkim1127 changed the title FSL/FIR Experimental Support FSL/FIR 실험지원 Sep 30, 2026
Add FieldRead, GuestPcRead and GuestNextPcWrite FIR ops (.fslc v8, minimal
version selection keeps v1-v7 bytes), a runtime-checked forward-only next-PC
contract with BadBranchTarget status, .fslseq v2 written only when guest control
is used, and C/Rust output. Standalone execution/emission refuse PC ops.
Validated on a synthetic fixture only; no loader-backed origins or real ISA.
@sjkim1127 sjkim1127 self-assigned this Oct 11, 2026
@sjkim1127 sjkim1127 changed the title FSL/FIR 실험지원 Project Fission: A Unified Semantic Engine Oct 17, 2026

This branch has not been deployed

No deployments
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant