Backport support for AD4130-4, AD4129 and AD4131

Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml

@@ -5,19 +5,30 @@
 $id: http://devicetree.org/schemas/iio/adc/adi,ad4130.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Analog Devices AD4130 ADC device driver
+title: Analog Devices AD4130 family ADCs
 
 maintainers:
   - Cosmin Tanislav <cosmin.tanislav@analog.com>
 
 description: |
-  Bindings for the Analog Devices AD4130 ADC. Datasheet can be found here:
+  Bindings for the Analog Devices AD4130 family ADCs.
+  Datasheets can be found here:
+    https://www.analog.com/media/en/technical-documentation/data-sheets/AD4129-4.pdf
+    https://www.analog.com/media/en/technical-documentation/data-sheets/AD4129-8.pdf
+    https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-4.pdf
     https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf
+    https://www.analog.com/media/en/technical-documentation/data-sheets/AD4131-4.pdf
+    https://www.analog.com/media/en/technical-documentation/data-sheets/AD4131-8.pdf
 
 properties:
   compatible:
     enum:
+      - adi,ad4129-4
+      - adi,ad4129-8
+      - adi,ad4130-4
       - adi,ad4130
+      - adi,ad4131-4
+      - adi,ad4131-8
 
   reg:
     maxItems: 1
@@ -32,6 +43,10 @@ properties:
 
   interrupts:
     maxItems: 1
+    description: |
+      Data Ready / FIFO interrupt. For devices with FIFO support, the
+      interrupt polarity specified here is inverted when the device enters
+      FIFO mode, and normal for data ready.
 
   interrupt-names:
     description: |

arch/arm/boot/dts/xilinx/zynq-coraz7s-ad4129-4.dts

@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Analog Devices AD4129-4
+ * https://www.analog.com/en/products/ad4129-4.html
+ *
+ * hdl_project: <ad719x_asdz/coraz7s>
+ *
+ * Copyright (C) 2026 Analog Devices, Inc.
+ */
+/dts-v1/;
+#include "zynq-coraz7s.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+&spi0 {
+	status = "okay";
+
+	ad4129_4@0 {
+		compatible = "adi,ad4129-4";
+		reg = <0>;
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		spi-max-frequency = <5000000>;
+		interrupts = <85 IRQ_TYPE_EDGE_FALLING>;
+		interrupt-parent = <&gpio0>;
+
+		channel@0 {
+			reg = <0>;
+
+			adi,reference-select = <2>;
+
+			/* AIN0, AIN1 */
+			diff-channels = <0 1>;
+		};
+
+		channel@1 {
+			reg = <1>;
+
+			adi,reference-select = <2>;
+
+			/* AIN4, AIN5 */
+			diff-channels = <4 5>;
+		};
+
+		channel@2 {
+			reg = <2>;
+
+			adi,reference-select = <2>;
+
+			/* Temperature Sensor, DGND */
+			diff-channels = <16 19>;
+		};
+
+		channel@3 {
+			reg = <3>;
+
+			adi,reference-select = <2>;
+
+			/* Internal reference, DGND */
+			diff-channels = <18 19>;
+		};
+
+		channel@4 {
+			reg = <4>;
+
+			adi,reference-select = <2>;
+
+			/* DGND, DGND */
+			diff-channels = <19 19>;
+		};
+	};
+};

arch/arm/boot/dts/xilinx/zynq-coraz7s-ad4129-8.dts

@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Analog Devices AD4129-8
+ * https://www.analog.com/en/products/ad4129-8.html
+ *
+ * hdl_project: <ad719x_asdz/coraz7s>
+ *
+ * Copyright (C) 2026 Analog Devices, Inc.
+ */
+/dts-v1/;
+#include "zynq-coraz7s.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+&spi0 {
+	status = "okay";
+
+	ad4129_8@0 {
+		compatible = "adi,ad4129-8";
+		reg = <0>;
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		spi-max-frequency = <5000000>;
+		interrupts = <85 IRQ_TYPE_EDGE_FALLING>;
+		interrupt-parent = <&gpio0>;
+
+		channel@0 {
+			reg = <0>;
+
+			adi,reference-select = <2>;
+
+			/* AIN8, AIN9 */
+			diff-channels = <8 9>;
+		};
+
+		channel@1 {
+			reg = <1>;
+
+			adi,reference-select = <2>;
+
+			/* AIN10, AIN11 */
+			diff-channels = <10 11>;
+		};
+
+		channel@2 {
+			reg = <2>;
+
+			adi,reference-select = <2>;
+
+			/* Temperature Sensor, DGND */
+			diff-channels = <16 19>;
+		};
+
+		channel@3 {
+			reg = <3>;
+
+			adi,reference-select = <2>;
+
+			/* Internal reference, DGND */
+			diff-channels = <18 19>;
+		};
+
+		channel@4 {
+			reg = <4>;
+
+			adi,reference-select = <2>;
+
+			/* DGND, DGND */
+			diff-channels = <19 19>;
+		};
+	};
+};

arch/arm/boot/dts/xilinx/zynq-coraz7s-ad4130-4.dts

@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Analog Devices AD4130-4
+ * https://www.analog.com/en/products/ad4130-4.html
+ *
+ * hdl_project: <ad719x_asdz/coraz7s>
+ *
+ * Copyright (C) 2026 Analog Devices, Inc.
+ */
+/dts-v1/;
+#include "zynq-coraz7s.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+&spi0 {
+	status = "okay";
+
+	ad4130_4@0 {
+		compatible = "adi,ad4130-4";
+		reg = <0>;
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		spi-max-frequency = <5000000>;
+		interrupts = <85 IRQ_TYPE_EDGE_FALLING>;
+		interrupt-parent = <&gpio0>;
+
+		channel@0 {
+			reg = <0>;
+
+			adi,reference-select = <2>;
+
+			/* AIN0, AIN1 */
+			diff-channels = <0 1>;
+		};
+
+		channel@1 {
+			reg = <1>;
+
+			adi,reference-select = <2>;
+
+			/* AIN4, AIN5 */
+			diff-channels = <4 5>;
+		};
+
+		channel@2 {
+			reg = <2>;
+
+			adi,reference-select = <2>;
+
+			/* Temperature Sensor, DGND */
+			diff-channels = <16 19>;
+		};
+
+		channel@3 {
+			reg = <3>;
+
+			adi,reference-select = <2>;
+
+			/* Internal reference, DGND */
+			diff-channels = <18 19>;
+		};
+
+		channel@4 {
+			reg = <4>;
+
+			adi,reference-select = <2>;
+
+			/* DGND, DGND */
+			diff-channels = <19 19>;
+		};
+	};
+};

arch/arm/boot/dts/xilinx/zynq-coraz7s-ad4130-8.dts

@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Analog Devices AD4130-8
+ * https://www.analog.com/en/products/ad4130-8.html
+ *
+ * hdl_project: <ad719x_asdz/coraz7s>
+ *
+ * Copyright (C) 2026 Analog Devices, Inc.
+ */
+/dts-v1/;
+#include "zynq-coraz7s.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+&spi0 {
+	status = "okay";
+
+	ad4130@0 {
+		compatible = "adi,ad4130";
+		reg = <0>;
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		spi-max-frequency = <5000000>;
+		interrupts = <85 IRQ_TYPE_EDGE_FALLING>;
+		interrupt-parent = <&gpio0>;
+
+		channel@0 {
+			reg = <0>;
+
+			adi,reference-select = <2>;
+
+			/* AIN8, AIN9 */
+			diff-channels = <8 9>;
+		};
+
+		channel@1 {
+			reg = <1>;
+
+			adi,reference-select = <2>;
+
+			/* AIN10, AIN11 */
+			diff-channels = <10 11>;
+		};
+
+		channel@2 {
+			reg = <2>;
+
+			adi,reference-select = <2>;
+
+			/* Temperature Sensor, DGND */
+			diff-channels = <16 19>;
+		};
+
+		channel@3 {
+			reg = <3>;
+
+			adi,reference-select = <2>;
+
+			/* Internal reference, DGND */
+			diff-channels = <18 19>;
+		};
+
+		channel@4 {
+			reg = <4>;
+
+			adi,reference-select = <2>;
+
+			/* DGND, DGND */
+			diff-channels = <19 19>;
+		};
+	};
+};