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alanmasu/README.md

🏔️ Hi, I'm Alan Masutti

From the wire to the silicon, one layer at a time.

RTL & FPGA · Computer Architecture · Embedded C · PCB Design · Linux

LinkedIn Email


About me

Hi! :)

I'm an Embedded Systems MSc student (EIT Digital, UniTrento + TalTech), currently living in Tallinn.

I started with electrical panels, then moved to PCBs and microcontrollers, and now I spend my time with processors and chips. The question behind most of my projects is always the same:

What happens one level below?

I'm especially interested in processor architectures and in how hardware and software meet: buses, drivers, toolchains, operating systems.

🔭 What I'm working on

TPU on silicon

Taking a TPU design from RTL to layout: synthesis and place & route with Cadence Genus and Innovus, verified in Xcelium. A university project, not public (yet).

Technologies: SystemVerilog Cadence Genus Innovus Xcelium

Didactic sensor board

A sensor board for the STM32 Nucleo-64, made to help students learn embedded systems hands-on with real sensors and actuators.
It's a team project: I'm working on the schematic and on the CMake-based STM32 libraries. A first working demo is already running.

Technologies: STM32 C CMake PCB design Sensors

SoC design on a ZedBoard

Learning how a full system on chip comes together: on-chip buses, IP integration and HW/SW co-design, with Linux running on a Xilinx Zynq.

Technologies: Xilinx Zynq Linux AXI HW/SW co-design

Didactic sensor board (in progress)

A sensor board for the STM32 Nucleo-64, made to help students learn embedded systems hands-on with real sensors and actuators. It's a team project: I'm working on the schematic and on the CMake-based STM32 libraries. A first working demo is already running, wich is not public (yet).

Technologies: STM32 C CMake PCB design Sensors


Past projects

🧠 Digital hardware

Thesis - RISC-V CPU whit BNN accelerator

A RISC-V (RV32I) core written in VHDL, with an AXI controller, GPIOS, I2C master interface, UART (through PS), a working toolchain and system calls implementation for newlib-nano, so it can actually run C code. In my bachelor's thesis I extended it with a small BNN hardware accelerator.

Technologies: VHDL RISC-V AXI Xilinx FPGA newlib
View repository →

TPU on silicon (in progress)

A TPU design taken through synthesis and place & route with Cadence Genus and Innovus, verified in Xcelium. A university project, not public (yet).

Technologies: SystemVerilog Cadence Genus Innovus Xcelium


🔌 Embedded systems

RP2040 custom board

A board designed in KiCad, assembled by hand with SMD components and then brought to life with my own firmware.

Technologies: KiCad RP2040 C SMD soldering
Firmware → · Hardware →

Bike computer

A bike computer built on a TI microcontroller, my first real dive into interrupts, DMA and sensor protocols.

Technologies: C TI MCU I2C SPI UART
View repository →

Scoreboard

A scoreboard for a local sports club, built with ESP32 and a custom PCB. It uses is composed of a main board and a remote control, communicating over ESP-NOW.

Technologies: ESP32 ESP-NOW C PCB design
View repository →


Main areas

  • Digital hardware: RTL design, VHDL, SystemVerilog, RISC-V, FPGA, RTL-to-GDSII flow
  • Embedded: C, C++, bare metal, STM32, RP2040, PCB design in KiCad
  • Systems: Linux, Xilinx Zynq, HW/SW co-design
  • Tools: Cadence (Xcelium, Genus, Innovus), Python, TCL, Git

Off the keyboard

I help out at the FabLab UniTrento, teach STEM in schools, and I've been a scout since I was a kid (now as an educator).
If I'm not at a desk, I'm probably in the mountains: hiking, climbing, bike touring or kayaking.


Estote parati ⚜️

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