feat(reset): expose pre-scan reset output#153
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Add a ResetGen output for the synchronized reset before the scan-mode mux so clock-gate enable logic can use the functional reset path while existing reset users keep the scan-muxed output.
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Add a ResetGen output for the synchronized reset before the scan-mode mux so clock-gate enable logic can use the functional reset path while existing reset users keep the scan-muxed output.