Write INIT/restart LGR sections in EGRID grid order, and mirror integer maps onto LGR grids

[hnil]

Two LGR output fixes. This changes the order of the per-LGR sections in INIT and UNRST — that is the fix, not a side effect.

1. Write INIT/restart LGR sections in EGRID grid order

EclipseGrid::save_children() writes the LGR grids to the EGRID by applying the print-order permutation to the father-sorted child-cell storage (getLGRCell(index)).

WriteInit::writeLGRLocalProperties() and RestartIO::writeLGRRestart() applied that same father-sorted permutation index to get_all_lgr_labels(), which is in deck order.

When deck order and father (host-cell) order differ — a CARFIN box with a low host-cell index declared after one with a high host-cell index — INIT and UNRST emit their per-LGR sections in a different order than the EGRID grids.

Post-processors pair the INIT/restart LGR sections to the EGRID LGR grids positionally, so the mismatch lines a grid's PORV array up with the wrong grid. In ResInsight it trips

ecl_grid_get_global_size(grid) == activeCellsForGrid.size()

Both writers now iterate through getLGRCell(index), identical to save_children, so the section order matches the EGRID; the simulator-provided, deck-ordered per-LGR data is addressed via the label's deck index (get_lgr_cell_index).

EGRID, INIT and UNRST now list the LGR grids in the same order with matching per-grid sizes.

Compatibility: any deck whose CARFIN declaration order already matches host-cell order is byte-identical. Only decks that were previously being written inconsistently change — and for those the old output was not loadable.

2. Write simulator integer maps (MPI_RANK) per LGR grid

INIT integer maps such as MPI_RANK were written only for the main grid via writeIntegerMaps(), so the array was simply absent on refined cells and did not show up on the refined region in post-processors.

Each integer map is now mirrored onto every LGR section in writeLGRLocalProperties: a refined cell inherits its father coarse cell's value via filterArray on global_fathers, the same mechanism already used for EQLNUM/FIPNUM. int_data is reused after writeIntegerMaps() rather than being moved-from.

Verified on SPE1CASE1_CARFIN1 at np=2: INIT now carries MPI_RANK in all three grid sections (main 300, each LGR 324, matching PORV/EQLNUM), the main grid carries ranks 0/1, and each box is uniformly its owning rank. Serial output is unchanged, since serial runs have no integer maps.

This one is additive rather than a bug fix — happy to split it out if you would rather take (1) alone.

Testing

test_RestartLGR, test_EclipseIO_LGR, test_HeadersLGR and test_AggregateWellDataLGR all pass. Built against opm-grid master.

[hnil]

Context for reviewers: OPM/opm-simulators#7245 enables ECL summary/FIP output for serial LGR runs, which today produce all-zero summaries. That is what makes this ordering fix observable end-to-end — the two are complementary but independent, and neither needs the other to build or merge.

[bska]

jenkins build this please

[bska]

Cool. I'll merge into master.