Add DRAM CECC and fatal harvest delay config options - #189
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Please address the code alignment and formatting issues first. We can continue the functional review afterward.
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Add configurable DRAM CECC OOB error counter mode and fatal harvest delay override to give BMC control over error counting behavior and syncflood reset timing. Reason: - DRAM CECC error counter mode was hardcoded to 1 (no-leak mode), preventing use of leaky bucket mode preferred for production. - Fatal harvest delay was not configurable, meaning BMC could not ensure sufficient time to collect MCA data before CPU reset. Changes: - Add DramCeccOobEcMode config (0=disabled, 1=no-leak, 2=leaky bucket) with default value 2 and MaxBoundLimit 2. - Add DramCeccLeakRate config (0x00-0x1F) with default 20 and MaxBoundLimit 31. Only used when DramCeccOobEcMode=2. - Add FatalHarvestDelayEn config (bool) with default true. - Add FatalHarvestDelayMins config (5-120 mins) with default 5. - Update getOobRegisters() and getRasOobConfig() to parse dram_cecc_leak_rate. - Update setMcaOobConfig() to use config values instead of hardcoded. - Update setMcaErrThreshold() for DRAM CECC threshold config values. - Add setFatalHarvestDelay() calling override_delay_reset_on_sync_flood. - Call setFatalHarvestDelay() in platformInitialize, watchdog handler, and runTimeErrorPolling wherever OOB configs are set/reapplied. Impact: - Users can configure DRAM CECC error counting via ras_config.json. - Leaky bucket mode (default) provides better production tracking. - Fatal harvest delay ensures time to collect MCA data after syncflood. - Config is reapplied on warm reboot and BIOS post complete events. Signed-off-by: Avenash Asai Thambi <aasaitha@amd.com>
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@ojayanth please review it again. Thanks |
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Description
Add configurable DRAM CECC OOB error counter mode and fatal harvest delay override to ras_config.json.
Changes
DRAM CECC OOB Config
DramCeccOobEcModeconfig (0=disabled, 1=no-leak, 2=leaky bucket)DramCeccLeakRateconfig (0x00-0x1F leak rate)dram_cecc_oob_ec_mode = 1with configurable valuesFatal Harvest Delay Override
setFatalHarvestDelay()to calloverride_delay_reset_on_sync_floodFatalHarvestDelayEn/FatalHarvestDelayMinsconfig keysTesting
Fatal harvest delay test log.txt
References
#154
#179