rp23xx: add hardware SHA-256 cryptodev support

Add an RP23xx hardware crypto driver for /dev/crypto with SHA-256
support backed by the RP2350 SHA accelerator.

Wire the new driver into the RP23xx ARM build and register
CRYPTO_SHA2_256 through cryptodev.

Also fix the RP23xx SHA256 CSR BSWAP bit definition in both the ARM and
RISC-V RP23xx headers. The previous value used bit 18, but the RP2350
hardware uses bit 12. Without this fix, the accelerator hashed input
words with the wrong byte order and produced incorrect digests.

Signed-off-by: karaketir16 <osmankaraketir@gmail.com>

Author: karaketir16

arch/arm/src/rp23xx/CMakeLists.txt

@@ -85,4 +85,8 @@ if(CONFIG_WATCHDOG)
   list(APPEND SRCS rp23xx_wdt.c)
 endif()
 
+if(CONFIG_CRYPTO_CRYPTODEV_HARDWARE)
+  list(APPEND SRCS rp23xx_crypto.c)
+endif()
+
 target_sources(arch PRIVATE ${SRCS})

arch/arm/src/rp23xx/Make.defs

@@ -88,3 +88,7 @@ endif
 ifeq ($(CONFIG_WATCHDOG),y)
 CHIP_CSRCS += rp23xx_wdt.c
 endif
+
+ifeq ($(CONFIG_CRYPTO_CRYPTODEV_HARDWARE),y)
+CHIP_CSRCS += rp23xx_crypto.c
+endif

arch/arm/src/rp23xx/hardware/rp23xx_sha256.h

@@ -48,7 +48,7 @@
 /* Register bit definitions *************************************************/
 
 #define RP23XX_SHA256_CSR_MASK               (0x00001317)
-#define RP23XX_SHA256_CSR_BSWAP              (1 << 18)
+#define RP23XX_SHA256_CSR_BSWAP              (1 << 12)
 #define RP23XX_SHA256_CSR_DMA_SIZE_MASK      (0x00000300)
 #define RP23XX_SHA256_CSR_ERR_WDATA_NOT_RDY  (1 << 4)
 #define RP23XX_SHA256_CSR_SUM_VLD            (1 << 2)