diff --git a/src/drt/src/pa/FlexPA_acc_pattern.cpp b/src/drt/src/pa/FlexPA_acc_pattern.cpp index aac4f833637..31920066b29 100644 --- a/src/drt/src/pa/FlexPA_acc_pattern.cpp +++ b/src/drt/src/pa/FlexPA_acc_pattern.cpp @@ -236,6 +236,7 @@ int FlexPA::genPatternsHelper( used_access_points, viol_access_points, max_access_point_size); + // Print entire node graph after DP pass bool is_valid = false; if (genPatternsCommit(unique_inst, nodes, @@ -441,12 +442,16 @@ int FlexPA::getEdgeCost( const std::set>& viol_access_points, const int max_access_point_size) { - int edge_cost = 0; auto [prev_pin_idx, prev_acc_point_idx] = prev_node->getIdx(); auto [curr_pin_idx, curr_acc_point_idx] = curr_node->getIdx(); + if (viol_access_points.contains(prev_node->getIdx()) + || viol_access_points.contains(curr_node->getIdx())) { + return kViolationCost; + } + if (prev_node->isSource() || curr_node->isSink()) { - return edge_cost; + return 0; } bool has_vio = false; @@ -545,11 +550,6 @@ int FlexPA::getEdgeCost( return kRepeatedApCost; } - if (viol_access_points.contains(prev_node->getIdx()) - || viol_access_points.contains(curr_node->getIdx())) { - return kViolationCost; - } - const int prev_node_cost = prev_node->getNodeCost(); const int curr_node_cost = curr_node->getNodeCost(); return prev_node_cost + curr_node_cost; diff --git a/src/drt/test/BUILD b/src/drt/test/BUILD index 5420c1fea7f..ba494d1ff89 100644 --- a/src/drt/test/BUILD +++ b/src/drt/test/BUILD @@ -20,6 +20,7 @@ COMPULSORY_TESTS = [ "ndr_vias3", "ndr_no_auto_taper", "obstruction", + "pa_single_pin", "single_step", "ta_ap_aligned", "ta_pin_aligned", @@ -111,7 +112,9 @@ filegroup( ] if test_name in [ "ispd18_sample_incr", "single_step", - ] else []), + ] else []) + ([ + "gf180/gf180mcu_5LM_1TM_9K_9t_tech.lef", + ] if test_name == "pa_single_pin" else []), ) for test_name in ALL_TESTS ] diff --git a/src/drt/test/CMakeLists.txt b/src/drt/test/CMakeLists.txt index 9957a9d3135..5bd64f170dd 100644 --- a/src/drt/test/CMakeLists.txt +++ b/src/drt/test/CMakeLists.txt @@ -10,6 +10,7 @@ or_integration_tests( ndr_vias3 ndr_no_auto_taper obstruction + pa_single_pin single_step ta_ap_aligned ta_pin_aligned diff --git a/src/drt/test/gf180/gf180mcu_5LM_1TM_9K_9t_tech.lef b/src/drt/test/gf180/gf180mcu_5LM_1TM_9K_9t_tech.lef new file mode 100644 index 00000000000..6d33dda236a --- /dev/null +++ b/src/drt/test/gf180/gf180mcu_5LM_1TM_9K_9t_tech.lef @@ -0,0 +1,1367 @@ +# Copyright 2022 GlobalFoundries PDK Authors +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +################################################################################## +# +# GLOBALFOUNDRIES +# +################################################################################## +# +# 180MCU Tech LEF File +# based on DRM DM-000013-01 Rev 13 +# TFG-Version: 2.1.9 +# Date: February 2018 +#------------------------------------------------------- +# metal stack option: 5LM_1TM_9K +# Preferred routing directions: +# vertical: Metal2 Metal4 +# horizontal: Metal1 Metal3 Metal5 +#------------------------------------------------------ +# This Techfile contains not correct Parasitic Information. +# USE Appropriate parasitic files for Parasitic Extraction. +#------------------------------------------------------ + +VERSION 5.7 ; +BUSBITCHARS "[]" ; +DIVIDERCHAR "/" ; + +UNITS + DATABASE MICRONS 2000 ; + CAPACITANCE PICOFARADS 1 ; + CURRENT MILLIAMPS 1 ; + RESISTANCE OHMS 1 ; +END UNITS + +SITE GF018hv5v_green_sc9 + SYMMETRY X Y ; + CLASS core ; + SIZE 0.56 BY 5.04 ; +END GF018hv5v_green_sc9 + +PROPERTYDEFINITIONS + LAYER LEF58_EOLENCLOSURE STRING ; + LAYER LEF58_TYPE STRING ; +END PROPERTYDEFINITIONS + +MANUFACTURINGGRID 0.0050 ; +CLEARANCEMEASURE EUCLIDEAN ; +USEMINSPACING OBS ON ; + +LAYER Poly2 + TYPE MASTERSLICE ; +END Poly2 + +LAYER CON + TYPE CUT ; +END CON + + + +LAYER Metal1 + TYPE ROUTING ; + DIRECTION HORIZONTAL ; + + PITCH 0.56 ; + OFFSET 0.0 ; + + MINWIDTH 0.230 ; # Mn.1 (n=1) + WIDTH 0.230 ; # Mn.1 (n=1) + SPACING 0.230 ; # Mn.2a (n=1) + SPACING 0.300 RANGE 10.005 999.00 ; # Mn.2b + AREA 0.1444 ; # Mn.3 + + THICKNESS 0.54 ; + ANTENNAMODEL OXIDE1 ; + ANTENNASIDEAREARATIO 400 ; + + DCCURRENTDENSITY AVERAGE 0.67 ; + ACCURRENTDENSITY AVERAGE 1.00 ; + + CAPACITANCE CPERSQDIST 0.0000394 ; + RESISTANCE RPERSQ 0.090000 ; + + MINIMUMDENSITY 30.0 ; + DENSITYCHECKWINDOW 200.0 200.0 ; + DENSITYCHECKSTEP 100.0 ; + +END Metal1 + + +LAYER Via1 + TYPE CUT ; + SPACING 0.26 ; + WIDTH 0.26 ; + + ENCLOSURE BELOW 0.00 0.06 ; + ENCLOSURE ABOVE 0.01 0.06 ; + PROPERTY LEF58_EOLENCLOSURE " + EOLENCLOSURE 0.34 0.06 ;" ; + + ARRAYSPACING CUTSPACING 0.36 ARRAYCUTS 4 SPACING 0.36 ; # Vn.2b + + ACCURRENTDENSITY AVERAGE 0.28 ; + DCCURRENTDENSITY AVERAGE 0.18 ; + ANTENNAMODEL OXIDE1 ; + ANTENNAAREARATIO 20.0 ; +END Via1 + + +LAYER Metal2 + TYPE ROUTING ; + DIRECTION VERTICAL ; + + PITCH 0.56 ; + OFFSET 0.0 ; + + MINWIDTH 0.280 ; + WIDTH 0.280 ; # Mn.1 (n>1) + SPACING 0.280 ; # Mn.2a (n>1) + SPACING 0.300 RANGE 10.005 999.00 ; # Mn.2b + AREA 0.1444 ; # Mn.3 + + THICKNESS 0.54 ; + ANTENNAMODEL OXIDE1 ; + ANTENNADIFFSIDEAREARATIO 400 ; + ANTENNAGATEPLUSDIFF 2 ; + + DCCURRENTDENSITY AVERAGE 0.67 ; + ACCURRENTDENSITY AVERAGE 1.00 ; + + CAPACITANCE CPERSQDIST 0.0000394 ; + RESISTANCE RPERSQ 0.090000 ; + + MINIMUMDENSITY 30.0 ; + DENSITYCHECKWINDOW 200.0 200.0 ; + DENSITYCHECKSTEP 100.0 ; + +END Metal2 + + +LAYER Via2 + TYPE CUT ; + SPACING 0.26 ; + WIDTH 0.26 ; + + ENCLOSURE BELOW 0.01 0.06 ; + ENCLOSURE ABOVE 0.01 0.06 ; + + # a bit conservative for Vn.3/4a without considering the protrusion length of 0.28 + PROPERTY LEF58_EOLENCLOSURE " EOLENCLOSURE 0.34 0.06 ; " ; + + ARRAYSPACING CUTSPACING 0.36 ARRAYCUTS 4 SPACING 0.36 ; # Vn.2b + + ACCURRENTDENSITY AVERAGE 0.28 ; + DCCURRENTDENSITY AVERAGE 0.18 ; + ANTENNAMODEL OXIDE1 ; + ANTENNAAREARATIO 20.0 ; +END Via2 + + +LAYER Metal3 + TYPE ROUTING ; + DIRECTION HORIZONTAL ; + + PITCH 0.56 ; + OFFSET 0.0 ; + + MINWIDTH 0.280 ; + WIDTH 0.280 ; # Mn.1 (n>1) + SPACING 0.280 ; # Mn.2a (n>1) + SPACING 0.300 RANGE 10.005 999.00 ; # Mn.2b + AREA 0.1444 ; # Mn.3 + + THICKNESS 0.54 ; + ANTENNAMODEL OXIDE1 ; + ANTENNADIFFSIDEAREARATIO 400 ; + ANTENNAGATEPLUSDIFF 2 ; + + DCCURRENTDENSITY AVERAGE 0.67 ; + ACCURRENTDENSITY AVERAGE 1.00 ; + + CAPACITANCE CPERSQDIST 0.0000394 ; + RESISTANCE RPERSQ 0.090000 ; + + MINIMUMDENSITY 30.0 ; + DENSITYCHECKWINDOW 200.0 200.0 ; + DENSITYCHECKSTEP 100.0 ; + +END Metal3 + + +LAYER Via3 + TYPE CUT ; + SPACING 0.26 ; + WIDTH 0.26 ; + + ENCLOSURE BELOW 0.01 0.06 ; + ENCLOSURE ABOVE 0.01 0.06 ; + + # a bit conservative for Vn.3/4a without considering the protrusion length of 0.28 + PROPERTY LEF58_EOLENCLOSURE " EOLENCLOSURE 0.34 0.06 ; " ; + + ARRAYSPACING CUTSPACING 0.36 ARRAYCUTS 4 SPACING 0.36 ; # Vn.2b + + ACCURRENTDENSITY AVERAGE 0.28 ; + DCCURRENTDENSITY AVERAGE 0.18 ; + ANTENNAMODEL OXIDE1 ; + ANTENNAAREARATIO 20.0 ; +END Via3 + + +LAYER Metal4 + TYPE ROUTING ; + DIRECTION VERTICAL ; + + PITCH 0.56 ; + OFFSET 0.0 ; + + MINWIDTH 0.280 ; + WIDTH 0.280 ; # Mn.1 (n>1) + SPACING 0.280 ; # Mn.2a (n>1) + SPACING 0.300 RANGE 10.005 999.00 ; # Mn.2b + AREA 0.1444 ; # Mn.3 + + THICKNESS 0.54 ; + ANTENNAMODEL OXIDE1 ; + ANTENNADIFFSIDEAREARATIO 400 ; + ANTENNAGATEPLUSDIFF 2 ; + + DCCURRENTDENSITY AVERAGE 0.67 ; + ACCURRENTDENSITY AVERAGE 1.00 ; + + CAPACITANCE CPERSQDIST 0.0000394 ; + RESISTANCE RPERSQ 0.090000 ; + + MINIMUMDENSITY 30.0 ; + DENSITYCHECKWINDOW 200.0 200.0 ; + DENSITYCHECKSTEP 100.0 ; + +END Metal4 + + +LAYER Via4 + TYPE CUT ; + SPACING 0.26 ; + WIDTH 0.26 ; + + ENCLOSURE BELOW 0.01 0.06 ; + # ENCLOSURE ABOVE 0.01 0.09 ; + ENCLOSURE ABOVE 0.01 0.06 ; + + # a bit conservative for Vn.3/4a without considering the protrusion length of 0.28 + PROPERTY LEF58_EOLENCLOSURE " EOLENCLOSURE 0.34 0.06 ; " ; + + ARRAYSPACING CUTSPACING 0.36 ARRAYCUTS 4 SPACING 0.36 ; # Vn.2b + + ACCURRENTDENSITY AVERAGE 0.28 ; + DCCURRENTDENSITY AVERAGE 0.18 ; + ANTENNAMODEL OXIDE1 ; + ANTENNAAREARATIO 20.0 ; +END Via4 + + + +LAYER Metal5 + TYPE ROUTING ; + DIRECTION HORIZONTAL ; + + OFFSET 0.0 ; + + + PITCH 0.9 ; + MINWIDTH 0.440 ; + WIDTH 0.440 ; # MT.1 + AREA 0.5625 ; # MT.4 + SPACING 0.460 ; # MT.2a + SPACING 0.600 RANGE 10.005 999.00 ; # MT.2b + + DCCURRENTDENSITY AVERAGE 1.21 ; + ACCURRENTDENSITY AVERAGE 1.82 ; + RESISTANCE RPERSQ 0.04000 ; + + THICKNESS 0.99 ; + + ANTENNAMODEL OXIDE1 ; + ANTENNADIFFSIDEAREARATIO 400 ; + ANTENNAGATEPLUSDIFF 2 ; + + CAPACITANCE CPERSQDIST 0.0000394 ; + + MINIMUMDENSITY 30.0 ; + DENSITYCHECKWINDOW 200.0 200.0 ; + DENSITYCHECKSTEP 100.0 ; + +END Metal5 + + + +LAYER OVERLAP + TYPE OVERLAP ; +END OVERLAP + +LAYER PR_bndry + TYPE MASTERSLICE ; +END PR_bndry + + +#------------------------------------------------------------ +# Via1 VIA SECTION +#------------------------------------------------------------ + VIA Via1_HH DEFAULT + RESISTANCE 4.500 ; + LAYER Via1 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal1 ; + RECT -0.190 -0.130 0.190 0.130 ; + LAYER Metal2 ; + RECT -0.190 -0.140 0.190 0.140 ; + END Via1_HH + + VIA Via1_HV DEFAULT + RESISTANCE 4.500 ; + LAYER Via1 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal1 ; + RECT -0.190 -0.130 0.190 0.130 ; + LAYER Metal2 ; + RECT -0.140 -0.190 0.140 0.190 ; + END Via1_HV + + VIA Via1_VH DEFAULT + RESISTANCE 4.500 ; + LAYER Via1 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal1 ; + RECT -0.130 -0.190 0.130 0.190 ; + LAYER Metal2 ; + RECT -0.190 -0.140 0.190 0.140 ; + END Via1_VH + + VIA Via1_VV DEFAULT + RESISTANCE 4.500 ; + LAYER Via1 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal1 ; + RECT -0.130 -0.190 0.130 0.190 ; + LAYER Metal2 ; + RECT -0.140 -0.190 0.140 0.190 ; + END Via1_VV + + VIA Via1_2CUT_H + LAYER Via1 ; + RECT -0.390 -0.130 -0.130 0.130 ; + RECT 0.130 -0.130 0.390 0.130 ; + LAYER Metal1 ; + RECT -0.450 -0.130 0.450 0.130 ; + LAYER Metal2 ; + RECT -0.400 -0.190 0.400 0.190 ; + END Via1_2CUT_H + + VIA Via1_2CUT_V + LAYER Via1 ; + RECT -0.130 -0.390 0.130 -0.130 ; + RECT -0.130 0.130 0.130 0.390 ; + LAYER Metal1 ; + RECT -0.190 -0.390 0.190 0.390 ; + LAYER Metal2 ; + RECT -0.140 -0.450 0.140 0.450 ; + END Via1_2CUT_V + + VIA Via1_2X2_0_60_10_60_H_H DEFAULT + LAYER Via1 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal1 ; + RECT -0.450 -0.390 0.450 0.390 ; + LAYER Metal2 ; + RECT -0.450 -0.400 0.450 0.400 ; + END Via1_2X2_0_60_10_60_H_H + + VIA Via1_2X2_0_60_10_60_H_V DEFAULT + LAYER Via1 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal1 ; + RECT -0.450 -0.390 0.450 0.390 ; + LAYER Metal2 ; + RECT -0.400 -0.450 0.400 0.450 ; + END Via1_2X2_0_60_10_60_H_V + + VIA Via1_2X2_0_60_10_60_V_H DEFAULT + LAYER Via1 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal1 ; + RECT -0.390 -0.450 0.390 0.450 ; + LAYER Metal2 ; + RECT -0.450 -0.400 0.450 0.400 ; + END Via1_2X2_0_60_10_60_V_H + + VIA Via1_2X2_0_60_10_60_V_V DEFAULT + LAYER Via1 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal1 ; + RECT -0.390 -0.450 0.390 0.450 ; + LAYER Metal2 ; + RECT -0.400 -0.450 0.400 0.450 ; + END Via1_2X2_0_60_10_60_V_V + +VIARULE Via1_GEN_HH GENERATE + LAYER Metal1 ; + ENCLOSURE 0.060 0.000 ; + LAYER Metal2 ; + ENCLOSURE 0.060 0.010 ; + LAYER Via1 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via1_GEN_HH + +VIARULE Via1_GEN_HV GENERATE + LAYER Metal1 ; + ENCLOSURE 0.060 0.000 ; + LAYER Metal2 ; + ENCLOSURE 0.010 0.060 ; + LAYER Via1 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via1_GEN_HV + +VIARULE Via1_GEN_VH GENERATE + LAYER Metal1 ; + ENCLOSURE 0.000 0.060 ; + LAYER Metal2 ; + ENCLOSURE 0.060 0.010 ; + LAYER Via1 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via1_GEN_VH + +VIARULE Via1_GEN_VV GENERATE + LAYER Metal1 ; + ENCLOSURE 0.000 0.060 ; + LAYER Metal2 ; + ENCLOSURE 0.010 0.060 ; + LAYER Via1 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via1_GEN_VV + + VIA Via1_4X4H_HH_DEFAULT DEFAULT + LAYER Via1 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal1 ; + RECT -1.120 -1.060 1.120 1.060 ; + LAYER Metal2 ; + RECT -1.120 -1.070 1.120 1.070 ; + END Via1_4X4H_HH_DEFAULT + + VIA Via1_4X4H_HV_DEFAULT DEFAULT + LAYER Via1 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal1 ; + RECT -1.120 -1.060 1.120 1.060 ; + LAYER Metal2 ; + RECT -1.070 -1.120 1.070 1.120 ; + END Via1_4X4H_HV_DEFAULT + + VIA Via1_4X4H_VH_DEFAULT DEFAULT + LAYER Via1 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal1 ; + RECT -1.060 -1.120 1.060 1.120 ; + LAYER Metal2 ; + RECT -1.120 -1.070 1.120 1.070 ; + END Via1_4X4H_VH_DEFAULT + + VIA Via1_4X4H_VV_DEFAULT DEFAULT + LAYER Via1 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal1 ; + RECT -1.060 -1.120 1.060 1.120 ; + LAYER Metal2 ; + RECT -1.070 -1.120 1.070 1.120 ; + END Via1_4X4H_VV_DEFAULT + +#------------------------------------------------------------ +# Via2 VIA SECTION +#------------------------------------------------------------ + VIA Via2_HH DEFAULT + RESISTANCE 4.500 ; + LAYER Via2 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal2 ; + RECT -0.190 -0.140 0.190 0.140 ; + LAYER Metal3 ; + RECT -0.190 -0.140 0.190 0.140 ; + END Via2_HH + + VIA Via2_HV DEFAULT + RESISTANCE 4.500 ; + LAYER Via2 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal2 ; + RECT -0.190 -0.140 0.190 0.140 ; + LAYER Metal3 ; + RECT -0.140 -0.190 0.140 0.190 ; + END Via2_HV + + VIA Via2_VH DEFAULT + RESISTANCE 4.500 ; + LAYER Via2 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal2 ; + RECT -0.140 -0.190 0.140 0.190 ; + LAYER Metal3 ; + RECT -0.190 -0.140 0.190 0.140 ; + END Via2_VH + + VIA Via2_VV DEFAULT + RESISTANCE 4.500 ; + LAYER Via2 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal2 ; + RECT -0.140 -0.190 0.140 0.190 ; + LAYER Metal3 ; + RECT -0.140 -0.190 0.140 0.190 ; + END Via2_VV + + VIA Via2_2CUT_H + LAYER Via2 ; + RECT -0.390 -0.130 -0.130 0.130 ; + RECT 0.130 -0.130 0.390 0.130 ; + LAYER Metal2 ; + RECT -0.390 -0.190 0.390 0.190 ; + LAYER Metal3 ; + RECT -0.450 -0.140 0.450 0.140 ; + END Via2_2CUT_H + + VIA Via2_2CUT_V + LAYER Via2 ; + RECT -0.130 -0.390 0.130 -0.130 ; + RECT -0.130 0.130 0.130 0.390 ; + LAYER Metal2 ; + RECT -0.130 -0.450 0.130 0.450 ; + LAYER Metal3 ; + RECT -0.190 -0.400 0.190 0.400 ; + END Via2_2CUT_V + + VIA Via2_2X2_0_60_10_60_H_H DEFAULT + LAYER Via2 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal2 ; + RECT -0.450 -0.390 0.450 0.390 ; + LAYER Metal3 ; + RECT -0.450 -0.400 0.450 0.400 ; + END Via2_2X2_0_60_10_60_H_H + + VIA Via2_2X2_0_60_10_60_H_V DEFAULT + LAYER Via2 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal2 ; + RECT -0.450 -0.390 0.450 0.390 ; + LAYER Metal3 ; + RECT -0.400 -0.450 0.400 0.450 ; + END Via2_2X2_0_60_10_60_H_V + + VIA Via2_2X2_0_60_10_60_V_H DEFAULT + LAYER Via2 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal2 ; + RECT -0.390 -0.450 0.390 0.450 ; + LAYER Metal3 ; + RECT -0.450 -0.400 0.450 0.400 ; + END Via2_2X2_0_60_10_60_V_H + + VIA Via2_2X2_0_60_10_60_V_V DEFAULT + LAYER Via2 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal2 ; + RECT -0.390 -0.450 0.390 0.450 ; + LAYER Metal3 ; + RECT -0.400 -0.450 0.400 0.450 ; + END Via2_2X2_0_60_10_60_V_V + +VIARULE Via2_GEN_HH GENERATE + LAYER Metal2 ; + ENCLOSURE 0.060 0.010 ; + LAYER Metal3 ; + ENCLOSURE 0.060 0.010 ; + LAYER Via2 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via2_GEN_HH + +VIARULE Via2_GEN_HV GENERATE + LAYER Metal2 ; + ENCLOSURE 0.060 0.010 ; + LAYER Metal3 ; + ENCLOSURE 0.010 0.060 ; + LAYER Via2 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via2_GEN_HV + +VIARULE Via2_GEN_VH GENERATE + LAYER Metal2 ; + ENCLOSURE 0.010 0.060 ; + LAYER Metal3 ; + ENCLOSURE 0.060 0.010 ; + LAYER Via2 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via2_GEN_VH + +VIARULE Via2_GEN_VV GENERATE + LAYER Metal2 ; + ENCLOSURE 0.010 0.060 ; + LAYER Metal3 ; + ENCLOSURE 0.010 0.060 ; + LAYER Via2 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via2_GEN_VV + + VIA Via2_4X4H_HH_DEFAULT DEFAULT + LAYER Via2 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal2 ; + RECT -1.120 -1.070 1.120 1.070 ; + LAYER Metal3 ; + RECT -1.120 -1.070 1.120 1.070 ; + END Via2_4X4H_HH_DEFAULT + + VIA Via2_4X4H_HV_DEFAULT DEFAULT + LAYER Via2 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal2 ; + RECT -1.120 -1.070 1.120 1.070 ; + LAYER Metal3 ; + RECT -1.070 -1.120 1.070 1.120 ; + END Via2_4X4H_HV_DEFAULT + + VIA Via2_4X4H_VH_DEFAULT DEFAULT + LAYER Via2 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal2 ; + RECT -1.070 -1.120 1.070 1.120 ; + LAYER Metal3 ; + RECT -1.120 -1.070 1.120 1.070 ; + END Via2_4X4H_VH_DEFAULT + + VIA Via2_4X4H_VV_DEFAULT DEFAULT + LAYER Via2 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal2 ; + RECT -1.070 -1.120 1.070 1.120 ; + LAYER Metal3 ; + RECT -1.070 -1.120 1.070 1.120 ; + END Via2_4X4H_VV_DEFAULT + +#------------------------------------------------------------ +# Via3 VIA SECTION +#------------------------------------------------------------ + VIA Via3_HH DEFAULT + RESISTANCE 4.500 ; + LAYER Via3 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal3 ; + RECT -0.190 -0.140 0.190 0.140 ; + LAYER Metal4 ; + RECT -0.190 -0.140 0.190 0.140 ; + END Via3_HH + + VIA Via3_HV DEFAULT + RESISTANCE 4.500 ; + LAYER Via3 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal3 ; + RECT -0.190 -0.140 0.190 0.140 ; + LAYER Metal4 ; + RECT -0.140 -0.190 0.140 0.190 ; + END Via3_HV + + VIA Via3_VH DEFAULT + RESISTANCE 4.500 ; + LAYER Via3 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal3 ; + RECT -0.140 -0.190 0.140 0.190 ; + LAYER Metal4 ; + RECT -0.190 -0.140 0.190 0.140 ; + END Via3_VH + + VIA Via3_VV DEFAULT + RESISTANCE 4.500 ; + LAYER Via3 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal3 ; + RECT -0.140 -0.190 0.140 0.190 ; + LAYER Metal4 ; + RECT -0.140 -0.190 0.140 0.190 ; + END Via3_VV + + VIA Via3_2CUT_H + LAYER Via3 ; + RECT -0.390 -0.130 -0.130 0.130 ; + RECT 0.130 -0.130 0.390 0.130 ; + LAYER Metal3 ; + RECT -0.450 -0.130 0.450 0.130 ; + LAYER Metal4 ; + RECT -0.400 -0.190 0.400 0.190 ; + END Via3_2CUT_H + + VIA Via3_2CUT_V + LAYER Via3 ; + RECT -0.130 -0.390 0.130 -0.130 ; + RECT -0.130 0.130 0.130 0.390 ; + LAYER Metal3 ; + RECT -0.190 -0.390 0.190 0.390 ; + LAYER Metal4 ; + RECT -0.140 -0.450 0.140 0.450 ; + END Via3_2CUT_V + + VIA Via3_2X2_0_60_10_60_H_H DEFAULT + LAYER Via3 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal3 ; + RECT -0.450 -0.390 0.450 0.390 ; + LAYER Metal4 ; + RECT -0.450 -0.400 0.450 0.400 ; + END Via3_2X2_0_60_10_60_H_H + + VIA Via3_2X2_0_60_10_60_H_V DEFAULT + LAYER Via3 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal3 ; + RECT -0.450 -0.390 0.450 0.390 ; + LAYER Metal4 ; + RECT -0.400 -0.450 0.400 0.450 ; + END Via3_2X2_0_60_10_60_H_V + + VIA Via3_2X2_0_60_10_60_V_H DEFAULT + LAYER Via3 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal3 ; + RECT -0.390 -0.450 0.390 0.450 ; + LAYER Metal4 ; + RECT -0.450 -0.400 0.450 0.400 ; + END Via3_2X2_0_60_10_60_V_H + + VIA Via3_2X2_0_60_10_60_V_V DEFAULT + LAYER Via3 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal3 ; + RECT -0.390 -0.450 0.390 0.450 ; + LAYER Metal4 ; + RECT -0.400 -0.450 0.400 0.450 ; + END Via3_2X2_0_60_10_60_V_V + +VIARULE Via3_GEN_HH GENERATE + LAYER Metal3 ; + ENCLOSURE 0.060 0.010 ; + LAYER Metal4 ; + ENCLOSURE 0.060 0.010 ; + LAYER Via3 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via3_GEN_HH + +VIARULE Via3_GEN_HV GENERATE + LAYER Metal3 ; + ENCLOSURE 0.060 0.010 ; + LAYER Metal4 ; + ENCLOSURE 0.010 0.060 ; + LAYER Via3 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via3_GEN_HV + +VIARULE Via3_GEN_VH GENERATE + LAYER Metal3 ; + ENCLOSURE 0.010 0.060 ; + LAYER Metal4 ; + ENCLOSURE 0.060 0.010 ; + LAYER Via3 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via3_GEN_VH + +VIARULE Via3_GEN_VV GENERATE + LAYER Metal3 ; + ENCLOSURE 0.010 0.060 ; + LAYER Metal4 ; + ENCLOSURE 0.010 0.060 ; + LAYER Via3 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via3_GEN_VV + + VIA Via3_4X4H_HH_DEFAULT DEFAULT + LAYER Via3 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal3 ; + RECT -1.120 -1.070 1.120 1.070 ; + LAYER Metal4 ; + RECT -1.120 -1.070 1.120 1.070 ; + END Via3_4X4H_HH_DEFAULT + + VIA Via3_4X4H_HV_DEFAULT DEFAULT + LAYER Via3 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal3 ; + RECT -1.120 -1.070 1.120 1.070 ; + LAYER Metal4 ; + RECT -1.070 -1.120 1.070 1.120 ; + END Via3_4X4H_HV_DEFAULT + + VIA Via3_4X4H_VH_DEFAULT DEFAULT + LAYER Via3 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal3 ; + RECT -1.070 -1.120 1.070 1.120 ; + LAYER Metal4 ; + RECT -1.120 -1.070 1.120 1.070 ; + END Via3_4X4H_VH_DEFAULT + + VIA Via3_4X4H_VV_DEFAULT DEFAULT + LAYER Via3 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal3 ; + RECT -1.070 -1.120 1.070 1.120 ; + LAYER Metal4 ; + RECT -1.070 -1.120 1.070 1.120 ; + END Via3_4X4H_VV_DEFAULT + +#------------------------------------------------------------ +# Via4 VIA SECTION +#------------------------------------------------------------ + VIA Via4_HH DEFAULT + RESISTANCE 4.500 ; + LAYER Via4 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal4 ; + RECT -0.190 -0.140 0.190 0.140 ; + LAYER Metal5 ; + RECT -0.220 -0.140 0.220 0.140 ; + END Via4_HH + + VIA Via4_HV DEFAULT + RESISTANCE 4.500 ; + LAYER Via4 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal4 ; + RECT -0.190 -0.140 0.190 0.140 ; + LAYER Metal5 ; + RECT -0.140 -0.220 0.140 0.220 ; + END Via4_HV + + VIA Via4_VH DEFAULT + RESISTANCE 4.500 ; + LAYER Via4 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal4 ; + RECT -0.140 -0.190 0.140 0.190 ; + LAYER Metal5 ; + RECT -0.220 -0.140 0.220 0.140 ; + END Via4_VH + + VIA Via4_VV DEFAULT + RESISTANCE 4.500 ; + LAYER Via4 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal4 ; + RECT -0.140 -0.190 0.140 0.190 ; + LAYER Metal5 ; + RECT -0.140 -0.220 0.140 0.220 ; + END Via4_VV + + VIA Via4_1_HH DEFAULT + RESISTANCE 4.500 ; + LAYER Via4 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal4 ; + RECT -0.190 -0.140 0.190 0.140 ; + LAYER Metal5 ; + RECT -0.190 -0.140 0.190 0.140 ; + END Via4_1_HH + + VIA Via4_1_HV DEFAULT + RESISTANCE 4.500 ; + LAYER Via4 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal4 ; + RECT -0.190 -0.140 0.190 0.140 ; + LAYER Metal5 ; + RECT -0.140 -0.190 0.140 0.190 ; + END Via4_1_HV + + VIA Via4_1_VH DEFAULT + RESISTANCE 4.500 ; + LAYER Via4 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal4 ; + RECT -0.140 -0.190 0.140 0.190 ; + LAYER Metal5 ; + RECT -0.190 -0.140 0.190 0.140 ; + END Via4_1_VH + + VIA Via4_1_VV DEFAULT + RESISTANCE 4.500 ; + LAYER Via4 ; + RECT -0.130 -0.130 0.130 0.130 ; + LAYER Metal4 ; + RECT -0.140 -0.190 0.140 0.190 ; + LAYER Metal5 ; + RECT -0.140 -0.190 0.140 0.190 ; + END Via4_1_VV + + VIA Via4_2CUT_H + LAYER Via4 ; + RECT -0.390 -0.130 -0.130 0.130 ; + RECT 0.130 -0.130 0.390 0.130 ; + LAYER Metal4 ; + RECT -0.400 -0.190 0.400 0.190 ; + LAYER Metal5 ; + RECT -0.450 -0.140 0.450 0.140 ; + END Via4_2CUT_H + + VIA Via4_2CUT_V + LAYER Via4 ; + RECT -0.130 -0.390 0.130 -0.130 ; + RECT -0.130 0.130 0.130 0.390 ; + LAYER Metal4 ; + RECT -0.140 -0.450 0.140 0.450 ; + LAYER Metal5 ; + RECT -0.190 -0.400 0.190 0.400 ; + END Via4_2CUT_V + + VIA Via4_2X2_10_60_10_60_H_H DEFAULT + LAYER Via4 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal4 ; + RECT -0.450 -0.400 0.450 0.400 ; + LAYER Metal5 ; + RECT -0.450 -0.400 0.450 0.400 ; + END Via4_2X2_10_60_10_60_H_H + + VIA Via4_2X2_10_60_10_60_H_V DEFAULT + LAYER Via4 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal4 ; + RECT -0.450 -0.400 0.450 0.400 ; + LAYER Metal5 ; + RECT -0.400 -0.450 0.400 0.450 ; + END Via4_2X2_10_60_10_60_H_V + + VIA Via4_2X2_10_60_10_60_V_H DEFAULT + LAYER Via4 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal4 ; + RECT -0.400 -0.450 0.400 0.450 ; + LAYER Metal5 ; + RECT -0.450 -0.400 0.450 0.400 ; + END Via4_2X2_10_60_10_60_V_H + + VIA Via4_2X2_10_60_10_60_V_V DEFAULT + LAYER Via4 ; + RECT -0.390 -0.390 -0.130 -0.130 ; + RECT 0.130 -0.390 0.390 -0.130 ; + RECT -0.390 0.130 -0.130 0.390 ; + RECT 0.130 0.130 0.390 0.390 ; + LAYER Metal4 ; + RECT -0.400 -0.450 0.400 0.450 ; + LAYER Metal5 ; + RECT -0.400 -0.450 0.400 0.450 ; + END Via4_2X2_10_60_10_60_V_V + +VIARULE Via4_GEN_HH GENERATE + LAYER Metal4 ; + ENCLOSURE 0.060 0.010 ; + LAYER Metal5 ; + ENCLOSURE 0.090 0.010 ; + LAYER Via4 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via4_GEN_HH + +VIARULE Via4_GEN_HV GENERATE + LAYER Metal4 ; + ENCLOSURE 0.060 0.010 ; + LAYER Metal5 ; + ENCLOSURE 0.010 0.090 ; + LAYER Via4 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via4_GEN_HV + +VIARULE Via4_GEN_VH GENERATE + LAYER Metal4 ; + ENCLOSURE 0.010 0.060 ; + LAYER Metal5 ; + ENCLOSURE 0.090 0.010 ; + LAYER Via4 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via4_GEN_VH + +VIARULE Via4_GEN_VV GENERATE + LAYER Metal4 ; + ENCLOSURE 0.010 0.060 ; + LAYER Metal5 ; + ENCLOSURE 0.010 0.090 ; + LAYER Via4 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via4_GEN_VV + +VIARULE Via4_0_RULE GENERATE + LAYER Metal4 ; + ENCLOSURE 0.010 0.060 ; + LAYER Metal5 ; + ENCLOSURE 0.060 0.010 ; + LAYER Via4 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via4_0_RULE + +VIARULE Via4_0 GENERATE + LAYER Metal4 ; + ENCLOSURE 0.010 0.060 ; + LAYER Metal5 ; + ENCLOSURE 0.010 0.060 ; + LAYER Via4 ; + RECT -0.130 -0.130 0.130 0.130 ; + SPACING 0.520 BY 0.520 ; +END Via4_0 + + VIA Via4_4X4H_HH_DEFAULT DEFAULT + LAYER Via4 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal4 ; + RECT -1.120 -1.070 1.120 1.070 ; + LAYER Metal5 ; + RECT -1.120 -1.070 1.120 1.070 ; + END Via4_4X4H_HH_DEFAULT + + VIA Via4_4X4H_HV_DEFAULT DEFAULT + LAYER Via4 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal4 ; + RECT -1.120 -1.070 1.120 1.070 ; + LAYER Metal5 ; + RECT -1.070 -1.120 1.070 1.120 ; + END Via4_4X4H_HV_DEFAULT + + VIA Via4_4X4H_VH_DEFAULT DEFAULT + LAYER Via4 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal4 ; + RECT -1.070 -1.120 1.070 1.120 ; + LAYER Metal5 ; + RECT -1.120 -1.070 1.120 1.070 ; + END Via4_4X4H_VH_DEFAULT + + VIA Via4_4X4H_VV_DEFAULT DEFAULT + LAYER Via4 ; + RECT -1.060 -1.060 -0.800 -0.800 ; + RECT -0.440 -1.060 -0.180 -0.800 ; + RECT 0.180 -1.060 0.440 -0.800 ; + RECT 0.800 -1.060 1.060 -0.800 ; + RECT -1.060 -0.440 -0.800 -0.180 ; + RECT -0.440 -0.440 -0.180 -0.180 ; + RECT 0.180 -0.440 0.440 -0.180 ; + RECT 0.800 -0.440 1.060 -0.180 ; + RECT -1.060 0.180 -0.800 0.440 ; + RECT -0.440 0.180 -0.180 0.440 ; + RECT 0.180 0.180 0.440 0.440 ; + RECT 0.800 0.180 1.060 0.440 ; + RECT -1.060 0.800 -0.800 1.060 ; + RECT -0.440 0.800 -0.180 1.060 ; + RECT 0.180 0.800 0.440 1.060 ; + RECT 0.800 0.800 1.060 1.060 ; + LAYER Metal4 ; + RECT -1.070 -1.120 1.070 1.120 ; + LAYER Metal5 ; + RECT -1.070 -1.120 1.070 1.120 ; + END Via4_4X4H_VV_DEFAULT + + +END LIBRARY diff --git a/src/drt/test/pa_single_pin.def b/src/drt/test/pa_single_pin.def new file mode 100644 index 00000000000..063414c6841 --- /dev/null +++ b/src/drt/test/pa_single_pin.def @@ -0,0 +1,36 @@ +VERSION 5.8 ; +DIVIDERCHAR "/" ; +BUSBITCHARS "[]" ; +DESIGN pa_single_pin_test ; +UNITS DISTANCE MICRONS 2000 ; +DIEAREA ( 1480000 2130000 ) ( 1500000 2160000 ) ; + +ROW ROW_0 gf180mcu_osu_sc_gp12t3v3 1490000 2141400 N DO 22 BY 1 STEP 200 0 ; + +TRACKS X 1479520 DO 25 STEP 1120 LAYER Metal1 ; +TRACKS Y 2129120 DO 30 STEP 1120 LAYER Metal1 ; +TRACKS X 1479520 DO 25 STEP 1120 LAYER Metal2 ; +TRACKS Y 2129120 DO 30 STEP 1120 LAYER Metal2 ; +TRACKS X 1479520 DO 25 STEP 1120 LAYER Metal3 ; +TRACKS Y 2129120 DO 30 STEP 1120 LAYER Metal3 ; +TRACKS X 1479520 DO 25 STEP 1120 LAYER Metal4 ; +TRACKS Y 2129120 DO 30 STEP 1120 LAYER Metal4 ; +TRACKS X 1479600 DO 20 STEP 1800 LAYER Metal5 ; +TRACKS Y 2129400 DO 20 STEP 1800 LAYER Metal5 ; + +COMPONENTS 1 ; + - u1 gf180mcu_osu_sc_gp12t3v3__tieh + PLACED ( 1490000 2141400 ) N ; +END COMPONENTS + +PINS 1 ; + - Y_OUT + NET n1 + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER Metal2 ( -500 -500 ) ( 500 500 ) + + PLACED ( 1494400 2149700 ) N ; +END PINS + +NETS 1 ; + - n1 ( PIN Y_OUT ) ( u1 Y ) + USE SIGNAL ; +END NETS + +END DESIGN diff --git a/src/drt/test/pa_single_pin.lef b/src/drt/test/pa_single_pin.lef new file mode 100644 index 00000000000..16643d44748 --- /dev/null +++ b/src/drt/test/pa_single_pin.lef @@ -0,0 +1,33 @@ +VERSION 5.8 ; +BUSBITCHARS "[]" ; +DIVIDERCHAR "/" ; + +SITE gf180mcu_osu_sc_gp12t3v3 + CLASS CORE ; + SIZE 0.1 BY 8.3 ; +END gf180mcu_osu_sc_gp12t3v3 + +MACRO gf180mcu_osu_sc_gp12t3v3__tieh + CLASS CORE ; + ORIGIN 0 0 ; + SIZE 2.2 BY 8.3 ; + SITE gf180mcu_osu_sc_gp12t3v3 ; + PIN Y + DIRECTION OUTPUT ; + USE SIGNAL ; + PORT + LAYER Metal1 ; + RECT 1.3 4.9 1.8 5.2 ; + RECT 1.4 4.85 1.65 7.25 ; + LAYER Metal2 ; + RECT 1.3 4.85 1.8 5.25 ; + LAYER Via1 ; + RECT 1.42 4.92 1.68 5.18 ; + END + END Y + OBS + LAYER Metal1 ; + RECT 1.15 2.3 1.65 2.55 ; + RECT 1.4 1.05 1.65 2.55 ; + END +END gf180mcu_osu_sc_gp12t3v3__tieh diff --git a/src/drt/test/pa_single_pin.ok b/src/drt/test/pa_single_pin.ok new file mode 100644 index 00000000000..36e42037f66 --- /dev/null +++ b/src/drt/test/pa_single_pin.ok @@ -0,0 +1,38 @@ +[INFO ODB-0388] unsupported LEF58_EOLENCLOSURE property for layer Via1 :" + EOLENCLOSURE 0.34 0.06 ;" +[INFO ODB-0388] unsupported LEF58_EOLENCLOSURE property for layer Via2 :" EOLENCLOSURE 0.34 0.06 ; " +[INFO ODB-0388] unsupported LEF58_EOLENCLOSURE property for layer Via3 :" EOLENCLOSURE 0.34 0.06 ; " +[INFO ODB-0388] unsupported LEF58_EOLENCLOSURE property for layer Via4 :" EOLENCLOSURE 0.34 0.06 ; " +[INFO ODB-0227] LEF file: gf180/gf180mcu_5LM_1TM_9K_9t_tech.lef, created 13 layers, 60 vias +[INFO ODB-0227] LEF file: pa_single_pin.lef, created 1 library cells +[INFO ODB-0128] Design: pa_single_pin_test +[INFO ODB-0130] Created 1 pins. +[INFO ODB-0131] Created 1 components and 1 component-terminals. +[INFO ODB-0133] Created 1 nets and 1 connections. +[WARNING DRT-0349] LEF58_ENCLOSURE with no CUTCLASS is not supported. Skipping for layer Via1 +[WARNING DRT-0349] LEF58_ENCLOSURE with no CUTCLASS is not supported. Skipping for layer Via1 +[WARNING DRT-0349] LEF58_ENCLOSURE with no CUTCLASS is not supported. Skipping for layer Via2 +[WARNING DRT-0349] LEF58_ENCLOSURE with no CUTCLASS is not supported. Skipping for layer Via2 +[WARNING DRT-0349] LEF58_ENCLOSURE with no CUTCLASS is not supported. Skipping for layer Via3 +[WARNING DRT-0349] LEF58_ENCLOSURE with no CUTCLASS is not supported. Skipping for layer Via3 +[WARNING DRT-0349] LEF58_ENCLOSURE with no CUTCLASS is not supported. Skipping for layer Via4 +[WARNING DRT-0349] LEF58_ENCLOSURE with no CUTCLASS is not supported. Skipping for layer Via4 +[INFO DRT-0167] List of default vias: + Layer Via2 + default via: Via2_VH + Layer Via3 + default via: Via3_HV + Layer Via4 + default via: Via4_1_VH +[INFO DRT-0168] Init region query. +[INFO DRT-0033] Poly2 shape region query size = 0. +[INFO DRT-0033] CON shape region query size = 0. +[INFO DRT-0033] Metal1 shape region query size = 4. +[INFO DRT-0033] Via1 shape region query size = 1. +[INFO DRT-0033] Metal2 shape region query size = 2. +[INFO DRT-0033] Via2 shape region query size = 0. +[INFO DRT-0033] Metal3 shape region query size = 0. +[INFO DRT-0033] Via3 shape region query size = 0. +[INFO DRT-0033] Metal4 shape region query size = 0. +[INFO DRT-0033] Via4 shape region query size = 0. +[INFO DRT-0033] Metal5 shape region query size = 0. diff --git a/src/drt/test/pa_single_pin.tcl b/src/drt/test/pa_single_pin.tcl new file mode 100644 index 00000000000..79146f88868 --- /dev/null +++ b/src/drt/test/pa_single_pin.tcl @@ -0,0 +1,19 @@ +# Regression test for https://github.com/The-OpenROAD-Project/OpenROAD/issues/10995 +# +# A standard cell with exactly one non-power pin (here a tie-high cell whose +# only signal pin is a small multi-shape Metal1/Metal2/Via1 pin) could fail +# pin access with DRT-0087/DRT-0085. FlexPA::getEdgeCost's viol_access_points +# check was placed after the isSource()/isSink() early return, but those are +# the only kind of edge that exist in the DP graph when an instance has just +# one real pin, so a rejected access point was never actually avoided on +# retry. +# +# The single instance and its placement below (including the absolute +# coordinates, which affect access-point/track grid alignment) are taken +# directly from the design that hit this bug, whittled down to the minimum +# needed to reproduce it. +source "helpers.tcl" +read_lef "gf180/gf180mcu_5LM_1TM_9K_9t_tech.lef" +read_lef "pa_single_pin.lef" +read_def "pa_single_pin.def" +pin_access -verbose 0